參數(shù)資料
型號： SPAK56F8346FV60
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 240 MHz, OTHER DSP, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-144
文件頁數(shù)： 5/156頁
文件大小： 2219K
代理商： SPAK56F8346FV60
102
56F8346 Technical Data
MOTOROLA
Preliminary
6.5.7.6
Clockout Disable (CLKDIS)—Bit 5
0 = CLKOUT output is enabled and will output the signal indicated by CLKOSEL
1 = CLKOUT is tri-stated
6.5.7.7
CLockout Select (CLKOSEL)—Bits 4–0
Selects clock to be muxed out on the CLKO pin.
00000 = SYS_CLK (from OCCS - DEFAULT)
00001 = Reserved for factory test—56800E clock
00010 = Reserved for factory test—XRAM clock
00011 = Reserved for factory test—PFLASH odd clock
00100 = Reserved for factory test—PFLASH even clock
00101 = Reserved for factory test—BFLASH clock
00110 = Reserved for factory test—DFLASH clock
00111 = Oscillator output
01000 = Fout (from OCCS)
01001 = Reserved for factory test—IPB clock
01010 = Reserved for factory test—Feedback (from OCCS, this is path to PLL)
01011 = Reserved for factory test—Prescaler Clk (from OCCS)
01100 = Reserved for factory test—Postscaler Clk (from OCCS)
01101 = Reserved for factory test—SYS_CLK_x2 (from OCCS)
01110 = Reserved for factory test—SYS_CLK_DIV2
01111 = Reserved for factory test—SYS_CLK_D
10000 = ADCA Clk
10001 = ADCB Clk
6.5.8
GPIO Peripheral Select Register (SIM_GPS)
The GPIO Peripheral Select register can be used to multiplex out any one of the three alternate peripherals
for GPIOC. The default peripheral is Quad Decoder 1 and Quad Timer B; these peripherals work together.
The four I/O pins associated with GPIO C can function as GPIO, Quad Decoder 1/Quad Timer B or as SPI 1
signals. GPIO is not the default and is enabled/disabled via the GPIOC_PER, as shown in Figure 6-10 and
Table 6-2. When GPIO C[3:0] are programmed to operate as peripheral I/O, then the choice between
decoder/timer and SPI inputs/outputs is made in the SIM_GPS register and in conjunction with the Quad
Timer Status and Control Registers (SCR). The default state is for the peripheral function of GPIO C[3:0]
to be programmed as decoder functions. This can be changed by altering the appropriate controls in the
indicated registers.
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