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參數(shù)資料
| 型號： | PLI9080 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI I/O ACCELERATOR |
| 中文描述： | 的PCI I / O加速器 |
| 文件頁數(shù)： | 5/133頁 |
| 文件大小： | 883K |
| 代理商： | PLI9080 |
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TABLE OF CONTENTS
PLX Technology, Inc., 1997
Page v
Version 0.93
4. REGISTERS.............................................................................................................................................................. 36
4.1 NEW REGISTER DEFINITIONS SUMMARY........................................................................................................ 36
4.1.1 Register Differences between PCI 9080 and PCI 9060, PCI 9060ES, and PCI 9060SD.................................. 37
4.2 REGISTER ADDRESS MAPPING........................................................................................................................ 43
4.2.1 PCI Configuration Registers............................................................................................................................ 43
4.2.2 Local Configuration Registers......................................................................................................................... 44
4.2.3 Runtime Registers.......................................................................................................................................... 45
4.2.4 DMA Registers............................................................................................................................................... 46
4.2.5 Messaging Queue Registers........................................................................................................................... 47
4.3 PCI CONFIGURATION REGISTERS ................................................................................................................... 48
4.3.1 (PCIIDR; PCI:00h, LOC:00h) PCI Configuration ID Register ........................................................................... 48
4.3.1.1 (PCICR; PCI:04h, LOC:04h) PCI Command Register................................................................................................48
4.3.2 (PCISR; PCI:06h, LOC:06h) PCI Status Register............................................................................................ 49
4.3.3 (PCIREV; PCI:08h, LOC:08h) PCI Revision ID Register.................................................................................. 49
4.3.4 (PCICCR; PCI:09-0Bh, LOC:09-0Bh) PCI Class Code Register...................................................................... 50
4.3.5 (PCICLSR; PCI:0Ch, LOC:0Ch) PCI Cache Line Size Register....................................................................... 50
4.3.6 (PCILTR; PCI:0Dh, LOC:0Dh) PCI Latency Timer Register............................................................................. 50
4.3.7 (PCIHTR; PCI:0Eh, LOC:0Eh) PCI Header Type Register .............................................................................. 51
4.3.8 (PCIBISTR; PCI:0Fh, LOC:0Fh) PCI Built-In Self Test (BIST) Register........................................................... 51
4.3.9 (PCIBAR0; PCI:10h, LOC:10h) PCI Base Address Register for Memory Accesses
to Local, Runtime, and DMA Registers.................................................................................................................... 52
4.3.10 (PCIBAR1; PCI:14h, LOC:14h) PCI Base Address Register for I/O Accesses
to Local, Runtime, and DMA Registers.................................................................................................................... 52
4.3.11 (PCIBAR2; PCI:18h, LOC:18h) PCI Base Address Register for Memory Accesses
to Local Address Space 0........................................................................................................................................ 53
4.3.12 (PCIBAR3; PCI:1Ch, LOC:1Ch) PCI Base Address Register for Memory Accesses
to Local Address Space 1........................................................................................................................................ 54
4.3.13 (PCIBAR4; PCI:20h, LOC:20h) PCI Base Address Register.......................................................................... 54
4.3.14 (PCIBAR5; PCI:24h, LOC:24h) PCI Base Address Register.......................................................................... 54
4.3.15 (PCICIS; PCI:28h, LOC:28h) PCI Cardbus CIS Pointer................................................................................. 55
4.3.16 (PCISVID; PCI:2Ch, LOC:2Ch) PCI Subsystem Vendor ID ........................................................................... 55
4.3.17 (PCISID; PCI:2Eh, LOC:2Eh) PCI Subsystem ID.......................................................................................... 55
4.3.18 (PCIERBAR; PCI:30h, LOC:30h) PCI Expansion ROM Base Register.......................................................... 55
4.3.19 (PCIILR; PCI:3Ch, LOC:3Ch) PCI Interrupt Line Register.............................................................................. 55
4.3.20 (PCIIPR; PCI:3Dh, LOC:3Dh) PCI Interrupt Pin Register............................................................................... 56
4.3.21 (PCIMGR; PCI:3Eh, LOC:3Eh) PCI Min_Gnt Register .................................................................................. 56
4.3.22 (PCIMLR; PCI:3Fh, LOC:3Fh) PCI Max_Lat Register ................................................................................... 56
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