參數(shù)資料
型號(hào)： PLI9080
廠商： Electronic Theatre Controls, Inc.
英文描述： PCI I/O ACCELERATOR
中文描述： 的PCI I / O加速器
文件頁數(shù)： 109/133頁
文件大?。?/td> 883K
代理商： PLI9080
SECTION 8
PCI 9080
TIMING DIAGRAMS
PLX Technology, Inc., 1997
Page 101
Version 0.93
Timing Diagram 8-31. (S Mode) Local Bus Read from Configuration Register
Timing Diagram 8-32. (S Mode) Direct Slave or DMA Burst Write to Local Bus
1
1
0
0
0
0
0
0
D15
D14
D13
D12
D1
1
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
D15 D14
D13
D12
D1
1
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D15
BITS 31-16 CFG REGISTER 0
HEX
BITS 15-0 CFG REGISTER 0
HEX
D14
D13
D12 D1
D10
D9
D8
D7
D6
D5
D4
D3
1
HEX
CONTINUES
D15 D14
D13 D12
D1
1
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SHORT: BITS 15-0 MAILBOX 1 LOC C4
HEX
START BIT 0 INDICATES EEPROM PRESENT ----|
INTERNALLY PULLED UP
LAST WORD
EESK, EEDO,EECS FROM CFG
REGISTERS
0us
5us
10us
15u
20us
25us
EESK
LRESETO#
EECS
EEDI
EEDO
.
EESK
EEDO
.
.
.
EESK
EECS
EEDO
Timing Diagram 8-1. Initialization from Serial EEPROM
HIGH IF DIRECT SLAVE REQUEST
MUST REMAIN HIGH UNTIL LHOLD GOES LOW
WILL NOT BE REASSERTED UNITL LHOLDA GOES LOW
PCI9060 DRIVES BUS
|--- CAN GO HIGH
0ns
100ns
200ns
300ns
400ns
500ns
600ns
LCLK
LHOLD
LDSHOLD
LHOLDA
LOCAL BUS
PCI 9080 always gives up bus between different local bus accesses:
different direct slave access, different DMA access, between direct slave/DMA accesses
Timing Diagram 8-2. PCI 9080 Local Bus Arbitration
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