參數(shù)資料
型號: MT90500AL
廠商: Mitel Networks Corporation
英文描述: Multi-Channel ATM AAL1 SAR
中文描述: 多通道自動柜員機AAL1特區(qū)
文件頁數(shù): 62/159頁
文件大?。?/td> 514K
代理商: MT90500AL
MT90500
62
4.5
UTOPIA Module
On the ATM transmit side, the MT90500 multiplexes ATM cells generated by the internal TX_SAR module with
ATM cells coming from the Secondary UTOPIA Port. Cells coming from the Secondary UTOPIA Port may be
generated by the optional external SAR device (e.g. AAL5 SAR) or another MT90500 device (see Figure 63,
“UTOPIA Bus Interconnections for Two MT90500s and an AAL5 SAR,” on page 139 for an application
example).
4.5.1
UTOPIA Overview
The UTOPIA module is used to daisy chain one or several SAR devices in order to use a single PHY device, as
seen below in Figure 24.
In the transmit direction, the Secondary UTOPIA Port of the MT90500 emulates a PHY, receiving cells from
other SAR devices on the bus. The MT90500 then forwards these cells to the actual PHY using the Primary
UTOPIA bus. The transmit portion of the UTOPIA module multiplexes the cell traffic from the Secondary
UTOPIA bus with the cell traffic from the MT90500’s TX_SAR. A small internal FIFO is used to buffer up to four
Secondary UTOPIA bus cells) and four TX_SAR cells. The TX_SAR and Secondary UTOPIA bus can have the
same transmit priority, or the priority can be given to the TX_SAR (this is determined by the Round-Robin
Priority bit in the UTOPIA Control Register at 4000h). No overruns are possible in the TX part of the UTOPIA
interface since flow control (UTOPIA bus handshaking) is used.
On the receive side, the MT90500 passively taps the Receive UTOPIA bus. Since the Receive UTOPIA bus is
multi-drop, cells may be received by more than one device. This can be used for redundant transfer of data or
timing. Cells can be received at the maximum transfer rate of the bus (up to 25 MHz). When a cell is received,
its header is analyzed: the cell is either ignored, or stored in the Primary Receive FIFO. (Ignored cells are
assumed to be destined for another device on the Receive UTOPIA bus.) The Primary Receive FIFO is internal
to the MT90500, and can contain 32 cells. If the internal Primary Receive FIFO is full, the received cell is
discarded, so it is important to use a master clock rate (MCLK) fast enough for the application. Further details
on the cell reception process are given in Section 4.5.3.
All cell transfers on both UTOPIA buses are performed using cell-level handshaking. See AF-PHY-0017 for
more information regarding UTOPIA standards. For details on chaining UTOPIA devices, see Section 7,
“Applications” of this datasheet. Details on configuring the PTXCLK pin are in the “Main Control Register,” on
page 84.
RX
RX
RX
RX
TX
TX
TX
TX
ABR SAR Device
PHY Device
ATM
Network
Figure 24 - MT90500 Daisy Chain Example
MT90500 Device
MT90500 Device
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相關代理商/技術參數(shù)
參數(shù)描述
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