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參數(shù)資料
| 型號(hào)： | MT90500AL |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Multi-Channel ATM AAL1 SAR |
| 中文描述： | 多通道自動(dòng)柜員機(jī)AAL1特區(qū) |
| 文件頁(yè)數(shù)： | 35/159頁(yè) |
| 文件大?。?/td> | 514K |
| 代理商： | MT90500AL |
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MT90500
35
4.1.3.3
Transmit Circular Buffers
The location of the Transmit Circular Buffers in external memory is determined by TXCBBASE (TX Circular
Buffer Base Address), found in register 6044h. The first Transmit Circular Buffer is located at TXCBBASE. The
second is located at TXCBBASE + 64, the third at TXCBBASE + 128, etc., as seen in Figure 4. All Transmit
Circular Buffers are 64 bytes long, so buffer addresses are not included in the control structure but are
considered to follow each other linearly, one after the other, corresponding to the order of the entries in the
control structure. Therefore, if the base address of the TX Circular Buffers was 10000h (as defined by the
TXCBBASE entry at 6044h), the first entry in the control structure (be it valid or not) would correspond to the
buffer at 10000h, the next to 10040h, the one after to 10080h, etc.
The last step of the TDM Data to External Memory Process transfers data from the internal frame buffer to the
Transmit Circular Buffers in external memory. The write pointer to all Transmit Circular Buffers is a single 8-bit
counter that increments every four frames as the Internal to External Memory transfer is performed. The 4 least
significant bits in this counter are used as the TDM Circular Buffer Write Pointer. All the desired TDM channels
in the internal frame buffer will be transferred into the Transmit Circular Buffers as specified by the Transmit
Circular Buffer Control Structure. Note that the Transmit Circular Buffer Control Structure must be initialized
before the Internal/External Memory Process is enabled (via the IEENA bit in register 6000h).
4.1.4
External Memory to TDM Data Output Process
4.1.4.1
General
The reassembly of received CBR (Constant Bit Rate) ATM cells into serial TDM output data is completed by
reading the data out of Receive Circular Buffers and placing the data on the TDM outputs. The data is written to
the Receive Circular Buffers by the RX_SAR (see Section 4.4.2, “RX_SAR Process,” on page 57). Then the
reading of serial TDM output data from the Receive Circular Buffers is performed by the External Memory to
TDM Data Output Process. This process will be outlined here.
The same internal frame buffer used in the TDM Data to External Memory Process is used to buffer the
received data to be transferred to the TDM output bus. As shown in Figure 6, this internal frame buffer holds 4
frames of output data for each TDM channel (to a maximum of 2,048 channels). This frame buffer is used in a
pingpong scheme where alternately half the memory is used to transfer data to the TDM buses while the other
half is being used to transfer data from the external memory. TDM data is transferred from the Receive Circular
Buffers in external memory to the internal frame buffer. As in the TDM Data to External Memory Process
described previously, the pointer to all Receive Circular Buffers is a single 8-bit counter that increments every
four frames as the External to Internal Memory transfer is performed. The least significant 4 to 8 bits of the
counter are used as the TDM Circular Buffer Read Pointer, depending on the size of the Receive Circular
Buffers.
TDM Output
Frame Buffer
TDM Buses
Internal Memory
External Memory
Figure 6 - External Memory to TDM Frame Buffer Transfer
Rx Circular Buffer 1
Rx Circular Buffer 2
Rx Circular Buffer n-1
Rx Circular Buffer n
Rx Circular Buffer 3
Each active DS0
channel occupies a
programmable-size
Receive Circular
Buffer (64, 128, 256,
512, or 1024 bytes)
相關(guān)PDF資料 |
PDF描述 |
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| MT90502 | Multi-Channel AAL2 SAR(多通道 ATM AAL2分段及重組設(shè)備（基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口）) |
| MT90732AP | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90732 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90733 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90733AP | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90500AL-ENG1 | 制造商:Mitel Networks Corporation 功能描述: |
| MT90502 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR |
| MT90502_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR |
| MT90502AG | 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: |
| MT90503 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:2048VC AAL1 SAR |
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