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參數(shù)資料
| 型號： | M66596FP |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 0.50 MM PITCH, LQFP-64 |
| 文件頁數(shù)： | 70/133頁 |
| 文件大?。?/td> | 1611K |
| 代理商： | M66596FP |
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M66596FP/WG
rev .1.00
2006.3.14
page 39 of 127
2.10.1 Isochronous errors
With this controller, data transfer errors that occur in isochronous transfers can be confirmed using the OVRN
bit and the CRCE bit of the FRMNUM register. In isochronous transfers, error notification by the NRDY
interrupt can be differentiated using the OVRN bit and the CRCE bit between data buffer errors and packet
errors.
Table 2.9 and Table 2.10 show the conditions under which the OVRN bit and CRCE bit are set to “1”.
Table 2.9 Error information when an NRDY interrupt is issued in an isochronous transfer reciving direction
Bit status
Issued when:
Issue conditions
Detected error
Operation
“OVRN=1"
Data packet is
received
A new data packet is received
before reading of buffer
memory is completed
Reception data buffer
overrun
The new data packet is
thrown out
“CRCE=1"
Data packet is
received
A CRC error, or, a bit stuffing
error is detected
Received packet error
The new data is packet
thrown out
Table 2.10 Error information when an NRDY interrupt is issued in an isochronous transfer sending direction
Bit status
Issued when:
Issue conditions
Detected error
Operation
"OVRN=1"
IN token is
received
An in-token is received before
writing to buffer memory is
completed
Transmission data buffer
underrun
Zero-Length packet
transmission
"CRCE=1"
Not issued
2.10.2 SOF interrupts and frame numbers
The SOFR interrupt operation mode should be selected using the SOFRM bit of the FRMNUM register. Also,
the current frame number can be confirmed using the FRNM bit of the FRMNUM register and the UFRNM bit of
the UFRNUM register.
In the peripheral mode, with this controller, the frame numbers are refreshed at the timing at which SOF
packets are received. If the controller is unable to detect an SOF packet because the packet has been corrupted,
or for another reason, the FRNM value is retained until a new SOF packet is received. At that point, the FRNM
bit based on the SOF interpolation timer is not refreshed. Also, the UFRNM bit is incremented in response to a
uSOF packet being received.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66596FP#RB0Z | 制造商:Renesas Electronics Corporation 功能描述:MCU - Trays 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Cut Tape 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Tray 制造商:Renesas 功能描述:USB Device Controller 64-Pin LQFP |
| M66596FPRB0Z | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Dual Function Controller,LQFP64 |
| M66596WG | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Dual Function Controller) |
| M66596WG#RB0Z | 制造商:Renesas Electronics 功能描述:Tray 制造商:Renesas 功能描述:0 |
| M6668 | 制造商:Tamura Corporation of America 功能描述: |
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