參數(shù)資料
型號: M66596FP
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 0.50 MM PITCH, LQFP-64
文件頁數(shù): 50/133頁
文件大小: 1611K
代理商: M66596FP
M66596FP/WG
rev .1.00
2006.3.14
page 21 of 127
2.4 USB signal control
Device state control register [DVSTCTR]
<Address: 04H>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
WKUP RWUPE USBRST RESUME UACT
RHST
?
0
-
0
01
0
?
0
-
0
-
0
Bit
Name
Function
S/W
H/W
Note
15-9
Nothing is placed here. These should be fixed at “0”.
8
WKUP
Wakeup output (Peripheral mode)
0: Non-output
1: Remote wakeup signal output
R/W(1) R/W(0)
7
RWUPE
Remote wakeup enable
(Host mode)
0: Remote wakeup disabled
1: Remote wakeup enabled
R/W
R
6
USBRST
USB bus reset output (Host mode)
0: Non-output
1: USB bus reset output
R/W
R
5
RESUME
Resume output (Host mode)
0: Non-output
1: Resume signal output
R/W
R/W(1)
4
UACT
USB Communication enable
0: Disable
1: Enable
R/W
R
3-2 Nothing is placed here. These should be fixed at “0”.
1-0 RHST
Reset handshake
00: Communication speed not decided
01: Reset handshake being processed
10: Full-Speed operation established
11: Hi-Speed operation established
R
W
<<Notes>>
*1) ”1” should never be written to the WKUP bit unless “Suspended” is set for the device state (“DVSQ = 1xx”) and
a remote wakeup from the USB host is enabled.
*2) If the WKUP or RWUPE bit is set 1,don’ t stop Internal clock supply.
*3) If the controller is in peripheral mode ,set to “RWUPE=0, USBRST=0, RESUME=0, UACT=0”.
Test mode register [TESTMODE]
<Address: 06H>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
UTST
?
0
-
0
-
0
-
0
-
0
Bit
Name
Function
S/W
H/W
Note
15-4 Nothing is placed here. These should be fixed at “0”.
3-0 UTST
Test mode
Please see the detailed explanation concerning
this item.
R/W
R
<<Note>>
*4)
The UTST bit is valid only during Hi-Speed operation. Check to make sure the “RHST=11” before using it.
H/W reset is required for after the test by UTST bit operation.
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