參數(shù)資料
型號： M66596FP
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 0.50 MM PITCH, LQFP-64
文件頁數(shù)： 133/133頁
文件大?。?/td> 1611K
代理商： M66596FP
M66596FP/WG
rev .1.00
2006.3.14
page 97 of 127
3.10 SOF interpolation function
In the Peripheral mode, if data could not be received at intervals of 1 ms (when using Full-Speed operation) or 125
s (when using Hi-Speed operation) because an SOF packet was corrupted or missing, the controller interpolates the
SOF. The SOF interpolation operation begins when “USBE=1”, “SCKE=1” and an SOF packet is received. The
interpolation function is initialized under the following conditions.
(1)
H/W reset
(2)
S/W reset
(3)
USB bus reset
(4)
Suspend state detected
Also, the SOF interpolation operates under the following specifications.
(1)
125
s/1 ms conforms to the results of the reset handshake protocol.
(2)
The interpolation function is not activated until an SOF packet is received.
(3)
After the first SOF packet is received, either 125
s or 1 ms is counted at an internal clock of 48 MHz, and
interpolation is carried out.
(4)
After the second and subsequent SOF packets are received, interpolation is carried out at the previous
reception interval.
(5)
Interpolation is not carried out in the suspended state or while a USB bus reset is being received.
(With suspended transitions during Hi-Speed operation, interpolation continues for 3 ms after the last
packet is received.
The contorller supports the following functions based on the SOF detection. Those functions also operate normally
with SOF interpolation is also activated for the following functions, if the SOF packet was corrupted.
(1)
Refreshing of the frame number and micro-frame number
(2)
SOFR interrupt timing and uSOF lock
(3)
SOF pulse output
(4)
Isochronous transfer interval count
If an SOF packet is missing when Full-Speed operation is being used, the FRNM bit of the FRMNUM0 register is
not refreshed. If a
SOF packet is missing during Hi-Speed operation, the UFRNM bit of the FRMNUM1 register is
refreshed.
However, if a
SOF packet for which “FRNM=000” is missing, the FRNM bit is not refreshed. If this happens, the
FRNM bit is not refreshed even if successive
SOF packets other than “FRNM=000” are received normally.
3.10.1 SOF pulse output
When SOF output is enabled, the controller is able to output SOF signals at the timing at which the SOFs are
received. When the value of the SOFM bit of the SOFCFG register is “01” (1 ms SOF) or “10” (125
s SOF), pulses are
output from the SOF_N pin in the “L” active state. These are called “SOF signals”. For information on pulse timing,
please see Figure 3.29 The controller outputs SOF output based on SOF packet reception events or SOF
interpolation events at uniform intervals.
USB Bus
SOF packet
1ms(Full-Speed) / 125us(High-Speed)
SOF
minimun 640ns
SYNC
PID
FRAME
CRC5
Figure 3.29 SOF output timing
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相關代理商/技術參數(shù)
參數(shù)描述
M66596FP#RB0Z 制造商:Renesas Electronics Corporation 功能描述:MCU - Trays 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Cut Tape 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Tray 制造商:Renesas 功能描述:USB Device Controller 64-Pin LQFP
M66596FPRB0Z 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Dual Function Controller,LQFP64
M66596WG 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Dual Function Controller)
M66596WG#RB0Z 制造商:Renesas Electronics 功能描述:Tray 制造商:Renesas 功能描述:0
M6668 制造商:Tamura Corporation of America 功能描述:
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