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| 型號(hào)： | GS4911B |
| 廠商： | Gennum Corporation |
| 英文描述： | HD/SD/Graphics Clock and Timing Generator with GENLOCK |
| 中文描述： | 高清/標(biāo)清/圖形時(shí)鐘和定時(shí)發(fā)生器鎖相 |
| 文件頁數(shù)： | 56/113頁 |
| 文件大?。?/td> | 1017K |
| 代理商： | GS4911B |
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GS4911B/GS4910B Data Sheet
36655 - 2
April 2006
56 of 113
Alternatively, depending on the information available, the user may program the
Output_H_Reset register (address 17h) instead of programming registers 18h and
19h. Output_H_Reset defines the denominator of the ratio of the output line
frequency to the input line frequency. Before Output_H_Reset is programmed, the
numerator and denominator must be reduced to their lowest factors.
For example, to genlock the output standard 720p/59.94 at 74.25/1.001MHz to the
input standard 525i/29.97 at 27MHz:
Therefore, program Output_H_Reset = 7. The numerator does not have to be
programmed.
NOTE: Either register 17h OR registers 18h and 19h should be programmed.
Programming all three registers will trigger two counter resets.
Programming OUTPUT_FV_RESET is preferred in all cases except where a
custom reference pulse is used in VID_STD[5:0] = 62 (see
Section 3.10.1 on
page 74
). In this case, OUTPUT_H_RESET must be used.
3.6.2.2 Programming the Internal Audio Genlock Block (GS4911B only)
By default, the audio clocks are always genlocked to the output video clock.
However, if a custom video or audio clock is programmed in the host interface (see
Section 3.9 on page 72
), the user must manually program the internal audio
genlock block.
A simplified version of the GS4911B’s internal audio genlock block is shown in
Figure 3-7
.
Figure 3-7: Internal Audio Genlock Block
Input Line Frequency
Video Clocks per Input H
Input Video Clock Frequency
1716
27000000
=
=
Ouput Line Frequency
Video Clocks per Output H
Output Video Clock Frequency
1650
74250000
1001
1000
×
=
=
Input Line Frequency
Output Line Frequency
∴
27000000
1000
1001
1716
1650
×
×
×
×
74250000
7
20
=
=
Internal Audio Genlock Block
A_Feedback_Divide
A_Reference_Divide
Phase
Comparator
Clock
Synthesizer
27MHz
Integer Multiple of
the Fundamental
Audio Sampling Clock
(n
*
(host address 3Dh - 3Eh)
(host address 3Bh - 3Ch)
f
s
(
Output Video
Clock
f
out
(
(
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| GS4911B_09 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:HD/SD/Graphics Clock and Timing Generator with GENLOCK |
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