參數(shù)資料
型號(hào)： GS4911B
廠商： Gennum Corporation
英文描述： HD/SD/Graphics Clock and Timing Generator with GENLOCK
中文描述： 高清/標(biāo)清/圖形時(shí)鐘和定時(shí)發(fā)生器鎖相
文件頁(yè)數(shù)： 36/113頁(yè)
文件大?。?/td> 1017K
代理商： GS4911B
GS4911B/GS4910B Data Sheet
36655 - 2
April 2006
36 of 113
3. Detailed Description
3.1 Functional Overview
The GS4911B/GS4910B is a highly flexible, digitally controlled clock synthesis
circuit and timing generator with genlock capability.
The device has two main modes of operation: Genlock mode and Free Run mode.
In Genlock mode, the video clock and timing outputs, will be frequency and phase
locked to the detected reference input signal. In Free Run mode, the occurrence of
all frequencies is based on a 27MHz external crystal reference.
The GS4911B/GS4910B will recognize input reference signals conforming to 36
different video standards and 16 different graphic formats. It supports
cross-locking, allowing the output to be genlocked to an incoming reference that is
different from the output video standard selected.
When the device is in Genlock mode and the input reference is removed, the
GS4911B/GS4910B will enter Freeze mode. In this mode, the output clock and
timing signals will maintain their previously genlocked phase and frequency to
within +/- 2ppm.
The user may select to output one of 8 different video sample clock rates or 13
different graphic display clock rates, or may program any clock frequency between
13.5MHz and 165MHz. The chosen clock frequency may be further internally
divided, and is available on two video clock outputs and one LVDS video clock
output pair. The video clocks may also be individually phase delayed with respect
to the timing outputs for clock skew control.
Eight user-selectable timing outputs are provided that can automatically produce
the following timing signals for 35 different video formats and 13 different graphics
formats: HSync, Hblanking, VSync, Vblanking, F sync, F digital, AFS (GS4911B
only), DE, and 10FID. Alternatively, custom output timing signals may be
programmed in the host interface.
In addition, the GS4911B provides three audio sample clock outputs that can
produce audio clocks up to 512fs with fs ranging from 9.7kHz to 96kHz. Audio to
video phasing is accomplished by either an external 10FID input reference, a
10FID signal specified via internal registers, or a user-programmed audio frame
sequence.
3.2 Modes of Operation
The GS4911B/GS4910B will operate in either Genlock mode or Free Run mode
depending on the setting of the GENLOCK pin. These two modes are described in
Section 3.2.1 on page 37
and
Section 3.2.2 on page 40
respectively.
If desired, the external GENLOCK pin may be ignored by setting bit 5 of the
Genlock_Control register (address 16h) so that genlock can instead be controlled
via the host interface (see
Section 3.12.3 on page 79
). Although the external
GENLOCK pin will be ignored in this case, it should not be left floating.
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