參數(shù)資料
型號: CL-PS7111
廠商: Cirrus Logic, Inc.
英文描述: Low-Power System-on-a-Chip
中文描述: 低功耗系統(tǒng)級晶片
文件頁數(shù): 91/105頁
文件大小: 1207K
代理商: CL-PS7111
PRELIMINARY DATA BOOK v2.0
September 1997
90
ELECTRICAL SPECIFICATIONS
CL-PS7111
Low-Power System-on-a-Chip
6.6.6
Software-Selectable Test Functionality
When bit 11 of the SYSCON register is set HIGH, all internal EPB accesses are output on the main
address and data buses as though they were external accesses to the address space addressed by CS5.
Hence CS5 handles a dual role: It is active as the strobe for internal accesses and for any accesses to
the standard address range for CS5. Additionally, in this mode, the internal signals are multiplexed out of
the device on port pins, as shown in
Table 6-5.
Table 6-5.
Software Selectable Test Functionality
Signal
I/O
Pin
Function
CLK
O
PE0
Waited clock to CPU
NIRQ
O
PE1
NIRQ interrupt to CPU
NFIQ
O
PE2
NFIQ interrupt to CPU
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