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參數(shù)資料
| 型號： | CL-PS7111 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | Low-Power System-on-a-Chip |
| 中文描述： | 低功耗系統(tǒng)級晶片 |
| 文件頁數(shù)： | 42/105頁 |
| 文件大?。?/td> | 1207K |
| 代理商： | CL-PS7111 |
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September 1997
41
PRELIMINARY DATA BOOK v2.0
FUNCTIONAL DESCRIPTION
CL-PS7111
Low-Power System-on-a-Chip
The codec is enabled when SYSCON2[0] is high. On power-up, this bit is reset low so that the codec is
disabled.
Table 3-16
shows the pin assignments for the serial interface.
3.16.1
Codec Interface
The codec interface allows a direct connection of a telephony-type codec to the CL-PS7111, providing all
the necessary clocks and timing pulses and performing serialization of the data stream to/from the exter-
nal codec. The interface is full-duplex and contains two separate data FIFOs (16- deep by 8-bits wide, one
for receive data, another for transmit data).
Data is transferred to/from the codec at 64 kbps, either written to or read from the appropriate 16-byte
FIFO. The sound interrupt is generated every 8 bytes transferred (FIFO half full/empty), which means the
interrupt rate is 1 kHz with a latency of 1 ms.
NOTE:
Both CDENRX and CDENTX must be enabled to receive or transmit, and upon completion of transmit the
speaker amplifier should be turned off to avoid audible noise. This is required because CL-PS7111 transmits
and receives data in FIFO.
3.16.2
ADC Interface — Master-Mode Only SSI (Synchronous Serial Interface)
The first synchronous serial interface allows peripheral devices (such as ADCs, that have an SPI
1
or
Microwire
2
compatible interface) to be directly connected to the CL-PS7111. The clock output frequency
is programmable and is only active during data transmissions to save power. There are four output fre-
quencies available, differing slightly between 13-MHz and 18.432-MHz mode (see
Table 3-17)
. The
required frequency is selected by programming the corresponding bits (16 and 17) in the SYSCON1 reg-
ister. The sample clock (SMPCLK) always runs at twice the frequency of the shift clock (ADCCLK).
1
SPI is a registered trademark of Motorola.
2
Microwire is a registered trademark of National Semiconductor.
Table 3-16. Serial Interface Pin Assignments
Pin Name
Type
Codec Functionality
PCMCLK
I/O
PCMCLK serial shift clock
PCMSYNC
O
PCMSYNC output frame sync
PCMOUT
O
PCMOUT serial output data
PCMIN
I
PCMIN serial input data
Table 3-17. ADC Interface Operation Frequencies
SYSCON1[16]
SYSCON1[17]
13.0-MHz Operation
ADCCLK
Frequency (kHz)
18.432-MHz Operation
ADCCLK
Frequency (kHz)
0
0
4.2
4
0
1
16.9
16
1
0
67.7
64
1
1
135.4
128
相關(guān)PDF資料 |
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| CL-PS7111-VC-A | Low-Power System-on-a-Chip |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CL-PS7111(208LQFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| CL-PS7111(256PBGA) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| CL-PS7111-VC-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7500FE | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:System-on-a Chip for Internet Appliance |
| CLPT-12SP-06 | 制造商:Tri-Star Electronics International 功能描述:CONNECTOR - Bulk |
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