參數(shù)資料
型號: ADT7462ACPZ-500RL7
廠商: ON SEMICONDUCTOR
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 4Cel, SQUARE, SURFACE MOUNT
封裝: 5 X 5 MM, LFCSP-32
文件頁數(shù): 70/88頁
文件大?。?/td> 836K
代理商: ADT7462ACPZ-500RL7
ADT7462
Rev. 2 | Page 72 of 88 | www.onsemi.com
Table 53. Register 0x16—EDO/Single-Channel Enable1
Bit
Name
R/W
Description
0
EDO_En1
R/W
Enable EDO on GPIO5. Default = 0.
1
EDO_En2
R/W
Enable EDO on GPIO6. Default = 0.
2
Single-Channel
Mode Select
R/W
Setting this bit to 1 places the ADT7462 in single-channel mode. This means that it converts on
one channel only. The channel it converts on is set using the channel select bits in this register.
Default = 0.
[7:3]
Channel Select
R/W
These bits are used to set the single channel that the ADT7462 measures in single-channel mode.
0000 0 = Pin 26 (default)
0000 1 = Remote 1 temperature
0001 0 = Remote 2 temperature
0001 1 = Remote 3 temperature
0010 0 = Local temperature
0010 1 = +12V1
0011 0 = +12V2
0011 1 = +12V3
0100 0 = +3.3V
0100 1 = Pin 15 voltage
0101 0 = Pin 19 voltage
0101 1 = +5V
0110 0 = Pin 23 voltage
0110 1 = Pin 24 voltage
0111 0 = Pin 25 voltage
1000 0 = +1.5V1 (ICH) voltage
1000 1 = +1.5V2 (3GIO) voltage
1 POR = 0x00, Lock = Y, SW Reset = Y.
Table 54. Register 0x18—Voltage Attenuator Configuration 11
Bit
Name
R/W
Description
0
Reserved
R
Reserved for future use.
1
Attenuator Pin 7
R/W
Setting this bit to 0 removes the attenuators for Pin 7. Default = 1 = attenuators enabled.
2
Attenuator Pin 8
R/W
Setting this bit to 0 removes the attenuators for Pin 8. Default = 1 = attenuators enabled.
3
Attenuator Pin 13
R/W
Setting this bit to 0 removes the attenuators for Pin13. Default = 1 = attenuators enabled.
4
Attenuator Pin 15
R/W
Setting this bit to 0 removes the attenuators for Pin 15. Default = 1 = attenuators enabled.
5
Attenuator Pin 19
R/W
Setting this bit to 0 removes the attenuators for Pin 19. Default = 1 = attenuators enabled.
6
Attenuator Pin 21
R/W
Setting this bit to 0 removes the attenuators for Pin 21. Default = 1 = attenuators enabled.
7
Attenuator Pin 22
R/W
Setting this bit to 0 removes the attenuators for Pin 22. Default = 1 = attenuators enabled.
1 POR = 0xFF, Lock = Y, SW Reset = Y.
Table 55. Register 0x19—Voltage Attenuator Configuration 21
Bit
Name
R/W
Description
0
Attenuator Pin 23
R/W
Setting this bit to 0 removes the attenuators for Pin 23. Default = 1 = attenuators enabled.
1
Attenuator Pin 24
R/W
Setting this bit to 0 removes the attenuators for Pin 24. Default = 1 = attenuators enabled.
2
Attenuator Pin 25
R/W
Setting this bit to 0 removes the attenuators for Pin 25. Default = 1 = attenuators enabled.
3
Reserved
R/W
Reserved for future use. Default = 0.
4
Attenuator Pin 28
R/W
Setting this bit to 0 removes the attenuators for Pin 28. Default = 1 = attenuators enabled.
5
Attenuator Pin 29
R/W
Setting this bit to 0 removes the attenuators for Pin 29. Default = 1 = attenuators enabled.
[7:6]
Reserved
R/W
Reserved for future use. Default = 00.
1 POR = 0x37, Lock = Y, SW Reset = Y.
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