參數(shù)資料
型號: ADT7462ACPZ-500RL7
廠商: ON SEMICONDUCTOR
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 4Cel, SQUARE, SURFACE MOUNT
封裝: 5 X 5 MM, LFCSP-32
文件頁數(shù): 19/88頁
文件大小: 836K
代理商: ADT7462ACPZ-500RL7
ADT7462
Rev. 2 | Page 26 of 88 | www.onsemi.com
Example Calculations
Given the LSB value for each channel, the corresponding code
for each voltage (or vice versa) can be calculated.
LSB
Voltage
Code
1
=
Example
The code for 1.8 V in a 1.8 V channel is
192
0094
.
0
8
.
1
=
Code
(that is, scale)
Similarly, the voltage, given the code in a particular channel, is
calculated as follows:
Voltage = Code × 1 LSB
where:
10 V is connected to the 12 V channel.
1 LSB = 0.0625.
Code = 160 decimal.
Voltage Measurement and Limit Registers
The corresponding register locations for voltage measurements
are listed in Table 17. Each voltage measurement channel has a
high and low voltage limit associated with it. The voltage
measurements are compared with these limits. The results of
these comparisons are stored in status registers. A Logic 0
indicates an in-limit condition, and a Logic 1 indicates an out-
of-limit condition. The ADT7462 can generate an ALERT, if
configured to do so, when a status bit is set. For more informa-
tion on the status registers and ALERT, see the Status and Mask
Registers and ALERT section. A complete list of all the high and
low voltage limits in the ADT7462 and their default values is
contained in Table 17.
Table 17. Voltage Value and Limit Registers
Low Limit
High Limit
Voltage Value
Pin No.
Value Register Address
Register
Default
Register
Default
+12V1
7
0xA3
0x6D
0x00
0x7C
0xFF
+12V2
8
0xA5
0x6E
0x00
0x7D
0xFF
+3.3V
13
0x96
0x70
0x00
0x68
0xFF
+1.8V or +2.5V
15
0x8B
0x45
0x40
0x49
0x95
+1.25V or +0.9V
19
0x8F
0x47
0x40
0x4B
0x95
+5V
21
0xA7
0x71
0x00
0x7E
0xFF
+12V3
22
0xA9
0x6F
0x00
0x7F
0xFF
VCCP1, +1.5V, +1.8V, +2.5V
23
0x90
0x72
0x20
0x69
0xFF
VCCP2, +1.5V, +1.8V, +2.5V
24
0x91
0x73
0x00
0x6A
0xFF
+1.2V1 (GBIT) or +3.3V
25
0x92
0x74
0x00
0x6B
0xFF
+1.2V2 (FSB_VTT) or VBATT
26
0x93
0x75
0x80
0x6C
0xFF
+1.5V1 (ICH)
28
0x94
0x76
0x00
0x50
0xA4
+1.5V2 (3GIO)
29
0x95
0x77
0x00
0x4C
0xA4
BATTERY MEASUREMENT INPUT (VBATT)
The VBATT input allows the condition of a CMOS backup battery
to be monitored. This is typically a lithium coin cell, such as a
CR2032. The VBATT input is accurate only for voltages greater
than 1.2 V. Note that when Pin 26 is configured as a +1.2V
input, voltages lower than 1.2 V are not accurately measured.
Input voltage and corresponding voltage measured are shown in
Figure 22.
Typically, the battery in a system is required to keep some
devices powered on when the system is in a powered-off state.
The VBATT measurement input is designed to minimize battery
drain. To reduce current drain from the battery, the lower
resistor of the VBATT attenuator is not connected, except when a
VBATT measurement is being made. The total current drain on
the VBATT pin is 80 nA typical (for a maximum VBATT voltage = 4
V), so a CR2032 CMOS battery functions in a system in excess
of the expected 10 years. Note that when a VBATT measurement
is not being made, the current drain is reduced to 16 nA typical.
Under normal voltage measurement operating conditions, all
measurements are made in a round-robin format, and each
reading is actually the result of 16 digitally averaged
measurements. However, averaging is not carried out on the
VBATT measurement to reduce measurement time and, therefore,
reduce the current drain from the battery.
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