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參數(shù)資料
| 型號： | ADT7462ACPZ-500RL7 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 4Cel, SQUARE, SURFACE MOUNT |
| 封裝： | 5 X 5 MM, LFCSP-32 |
| 文件頁數(shù)： | 13/88頁 |
| 文件大?。?/td> | 836K |
| 代理商： | ADT7462ACPZ-500RL7 |
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ADT7462
Rev. 2 | Page 20 of 88 | www.onsemi.com
READ OPERATIONS
The ADT7462 uses the following SMBus read protocols.
Receive Byte
The receive byte is useful when repeatedly reading a single
register. The register address must be set up previously. In this
operation, the master device receives a single byte from a slave
device as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
read bit (high).
3.
The addressed slave device asserts an ACK on SDA.
4.
The master receives a data byte.
5.
The master asserts a NO ACK on SDA.
6.
The master asserts a stop condition on SDA to end the
transaction.
For the ADT7462, the receive byte protocol is used to read a
single byte of data from a register whose address has previously
been set by a send byte or write a byte operation.
23
14
6
5
SLAVE
ADDRESS
SR
DATA
P
A
055
69-
021
Figure 31. Single Byte Read from a Register
Block Read
In this operation, the master device reads a block of data from
a slave device. The start address for a block read must be set
previously, as well as the number of bytes to be read (maximum
= 32). In the case of the ADT7462, the start address is activated
by a send byte operation to set a RAM address. The number
of bytes to be read should be written to the #Bytes bits in the
Configuration 0 register. The block read operation consists of
a send byte operation that sends a block read command to the
slave, immediately followed by a repeated start and a read
operation that reads out multiple data bytes, as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an ACK on SDA.
4.
The master sends a command code that tells the slave
device to expect a block read. The ADT7462 command
code for a block read is 0xA1 (1010 0001).
5.
The slave asserts an ACK on SDA.
6.
The master asserts a repeat start condition on SDA.
7.
The master sends the 7-bit slave address followed by the
read bit (high).
8.
The slave asserts an ACK on SDA.
9.
The ADT7462 sends a byte count telling the master how
many data bytes to expect. The maximum number of
bytes is 32.
10. The master asserts an ACK on SDA.
11. The master receives the expected number of data bytes.
12. The master asserts an ACK on SDA after each data byte.
13. The ADT7462 issues a PEC byte to the master. The master
should check the PEC byte and issue another block read if
the PEC byte is incorrect.
14. A NO ACK is generated after the PEC byte to signal the
end of the read.
15. The master asserts a stop condition on SDA to end the
transaction.
S
SLAVE
ADDRESS WA
COMMAND
0xA1 BLOCK
READ
A
S
R
AP
DATA
32
PEC
A
BYTE
COUNT A DATA 1 A
SLAVE
ADDRESS
A
1
8
9
10
12
13
14 15
11
23
4
5
6
7
05569
-0
22
Figure 32. Block Read from RAM
Note that although the ADT7462 supports packet error
checking (PEC), its use is optional. The PEC byte is calculated
using CRC-8. The frame check sequence (FCS) conforms to
CRC-8 by the polynomial
()
1
2
8
+
=
x
C
Consult the SMBus 1.1 specifications for more information.
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| ADT7462ACPZ-5RL7 | 功能描述:監(jiān)控電路 FLX H/WRE MON IC SRV RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| ADT7462ACPZ-R7 | 功能描述:監(jiān)控電路 FLX H/WRE MON IC SRV RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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