參數(shù)資料
型號: ADT7462ACPZ-500RL7
廠商: ON SEMICONDUCTOR
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 4Cel, SQUARE, SURFACE MOUNT
封裝: 5 X 5 MM, LFCSP-32
文件頁數(shù): 11/88頁
文件大小: 836K
代理商: ADT7462ACPZ-500RL7
ADT7462
Rev. 2 | Page 19 of 88 | www.onsemi.com
WRITE OPERATIONS
The SMBus specification defines several protocols for different
types of read and write operations. The ones used in the ADT7462
are discussed below. The following abbreviations are used in the
diagrams:
S – Start
P – Stop
R – Read
W – Write
A – Acknowledge
A – No Acknowledge
The ADT7462 uses the following SMBus write protocols.
Send Byte
In this operation, the master device sends a single command
byte to a slave device as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an ACK on SDA.
4.
The master sends a command code.
5.
The slave asserts an ACK on SDA.
6.
The master asserts a stop condition on SDA to end the
transaction.
For the ADT7462, the send byte protocol is used to write a
register address to RAM for a subsequent single byte read from
the same address. This operation is shown in Figure 28.
SLAVE
ADDRESS
REGISTER
ADDRESS
SW A
A P
24
13
5
6
05569
-0
18
Figure 28. Setting a Register Address for a Subsequent Read
If it is required to read data from the register immediately after
setting up the address, the master can assert a repeat start
condition immediately after the final ACK and carry out a
single byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte and
one data byte to the slave device as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an ACK on SDA.
4.
The master sends a command code.
5.
The slave asserts an ACK on SDA.
6.
The master sends a data byte.
7.
The slave asserts an ACK on SDA.
8.
The master asserts a stop condition on SDA to end the
transaction.
SLAVE
ADDRESS
SLAVE
ADDRESS
SW A
DATA
AP
A
24
13
5
8
7
6
05
569
-0
19
Figure 29. Single Byte Write to a Register
Block Write
In this operation, the master device writes a block of data to a
slave device. The start address for a block write must be set
previously. In the case of the ADT7462, this is done by a send
byte operation to set a RAM address. The user writes the
number of registers to be written to in the block read command
to the #Bytes bits of the Configuration 0 register.
1.
The master device asserts a start condition on the SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an ACK on the SDA.
4.
The master sends a command code that tells the slave
device to expect a block write. The ADT7462 command
code for a block write is 0xA0 (1010 0000).
5.
The slave asserts an ACK on SDA.
6.
The master sends the data bytes (the number of data bytes
sent is written to the #Bytes bits of the Configuration 0
register).
7.
The slave asserts an ACK on SDA after each data byte.
8.
The master sends a packet error checking (PEC) byte.
9.
The ADT7462 checks the PEC byte and issues an ACK,
if correct. If incorrect (NO ACK), the master resends the
data bytes.
10. The master asserts a stop condition on SDA to end the
transaction.
SW A
A
ADATA 1 AA
AP
DATA 2 A DATA
32
PEC
SLAVE
ADDRESS
COMMAND
0xA0
BLOCK
WRITE
BYTE
COUNT
1
2
3
4
5
678
9
10 11 12
055
69-
020
Figure 30. Block Write to ADT7462
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