參數(shù)資料
型號: ADT7462ACPZ-500RL7
廠商: ON SEMICONDUCTOR
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 4Cel, SQUARE, SURFACE MOUNT
封裝: 5 X 5 MM, LFCSP-32
文件頁數(shù): 68/88頁
文件大?。?/td> 836K
代理商: ADT7462ACPZ-500RL7
ADT7462
Rev. 2 | Page 70 of 88 | www.onsemi.com
Table 47. Register 0x0F—THERM2 Configuration Register1
Bit
Name
R/W
Description
0
THERM2 Timer Enable
R/W
Enables the THERM2 timer circuit. Default = 0.
1
THERM2_Local
R/W
Setting the bit to 1 means that the THERM2 pin is asserted low as an output whenever
the local temperature exceeds the local THERM2 temperature limit. Default = 0.
2
THERM2_Remote 1
R/W
Setting the bit to 1 means that the THERM2 pin is asserted low as an output whenever
the Remote 1 temperature exceeds the Remote 1 THERM2 temperature limit. Default = 0.
3
THERM2_Remote 2
R/W
Setting the bit to 1 means that the THERM2 pin is asserted low as an output whenever
the Remote 2 temperature exceeds the Remote 2 THERM2 temperature limit. Default = 0.
4
THERM2_Remote 3
R/W
Setting the bit to 1 means that the THERM2 pin is asserted low as an output whenever
the Remote 3 temperature exceeds the Remote 3 THERM2 temperature limit. Default = 0.
[7:5]
Reserved
R
Reserved for future use.
1 POR = 0x00, Lock = Y, SW Reset = Y.
Table 48. Register 0x10—Pin Configuration Register 11
Bit
Name
R/W
Description
0
Pin 7
R/W
0 = +12V1; 1 = TACH5 input. Default =1.
1
Pin 4
R/W
0 = GPIO4; 1= TACH4 input (that is, if the VIDs are not selected). Default = 1.
2
Pin 3
R/W
0 = GPIO3; 1= TACH3 input (that is, if the VIDs are not selected). Default = 1.
3
Pin 2
R/W
0 = GPIO2; 1= TACH2 input (that is, if the VIDs are not selected). Default = 1.
4
Pin 1
R/W
0 = GPIO1; 1= TACH1 input (that is, if the VIDs are not selected). Default = 1.
5
Diode 3
R/W
1 enables the D3+ and D3 inputs on Pin 19 and Pin 20. 0 enables the voltage measurement
input and SCSI_TERM2 input. Default = 1.
6
Diode 1
R/W
1 enables the D1+ and D1 inputs on Pin 15 and Pin 16. 0 enables the voltage measurement
input and SCSI_TERM1 input. Default = 1.
7
VIDs
R/W
Setting this bit to 1 enables the VIDs on Pin 1 to Pin 4, Pin 28, Pin 31, and Pin 32. Default = 0.
1 POR = 0x7F, Lock = Y, SW Reset = Y.
Table 49. Register 0x11—Pin Configuration Register 21
Bit
Name
R/W
Description
[1:0]
Pin 23
R/W
00 = VCCP1 selected.
01 = +2.5V.
10 = +1.8V (default).
11 = +1.5V.
2
Pin 22
R/W
0 = +12V3; 1 = TACH8. Default = 1.
3
Pin 21
R/W
0 = +5V; 1 = TACH7. Default = 1.
4
Pin 19
R/W
0 = +1.25V; 1 = +0.9V (that is, if RT3 is not selected). Default = 0.
5
Pin 15
R/W
0 = +2.5V, 1 = +1.8V (that is, if RT1 is not selected). Default = 0.
6
Pin 13
R/W
0 = +3.3V; 1 = PWM4. Default = 1.
7
Pin 8
R/W
0 = +12V2; 1 = TACH6. Default = 1.
1 POR = 0xCE, Lock = Y, SW Reset = Y.
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