參數(shù)資料
型號(hào)： ADT7462ACPZ-500RL7
廠商： ON SEMICONDUCTOR
元件分類： 溫度/濕度傳感器
英文描述： DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 4Cel, SQUARE, SURFACE MOUNT
封裝： 5 X 5 MM, LFCSP-32
文件頁數(shù)： 2/88頁
文件大?。?/td> 836K
代理商： ADT7462ACPZ-500RL7
ADT7462
Rev. 2 | Page 10 of 88 | www.onsemi.com
Configuration Option 2
Configuration Option 2 is used for thermal monitoring and fan
control for Processor 1 and Processor 2 in a dual processor
system. It can also monitor one set of VIDs, if required.
Features of Configuration Option 2 include the following:
One local and three remote thermal channels
Up to four PWM drives and up to eight TACH inputs
(VID pins and TACHs/PWMs are muxed together)
Two THERM I/Os
Two VRD inputs
RESET I/O
Two VCCP voltage monitoring channels
Figure 5 shows the pin configuration when Configuration
Option 2 is chosen.
PIN 1
INDICATOR
1
TACH1
2
TACH2
3
TACH3
4
TACH4
5
VCC
6
GND
7
TACH5
8
TACH6
24
VCCP2
23
VCCP1
22
TACH8
21
TACH7
20
D3–
19
D3+
18
D2–
17
D2+
9
S
C
L
10
S
D
A
11
A
D
12
A
L
E
R
T
13
P
W
M
4
14
R
E
S
E
T
15
D
1+
16
D
1–
32
P
W
M
2
31
P
W
M
1
30
P
W
M
3
29
T
H
E
R
M
2
28
T
H
E
R
M
1
27
F
A
N
2M
A
X
26
V
R
_H
O
T
2
25
V
R
_H
O
T
1
ADT7462
TOP VIEW
(Not to Scale)
05
569-
01
1
Figure 5. Configuration Option 2
Table 7. Configuration Option 2
Pin
Function
Configuration Register
Bit Value
11
TACH1
Pin Configuration Register 1
Bit 4 = 1
21
TACH2
Pin Configuration Register 1
Bit 3 = 1
31
TACH3
Pin Configuration Register 1
Bit 2 = 1
41
TACH4
Pin Configuration Register 1
Bit 1 = 1
7
TACH5
Pin Configuration Register 1
Bit 0 = 1
8
TACH6
Pin Configuration Register 2
Bit 7 = 1
13
PWM4
Pin Configuration Register 2
Bit 6 = 1
15
D1+
Pin Configuration Register 1
Bit 6 = 1
16
D1
Pin Configuration Register 1
Bit 6 = 1
19
D3+
Pin Configuration Register 1
Bit 5 = 1
20
D3
Pin Configuration Register 1
Bit 5 = 1
21
TACH7
Pin Configuration Register 2
Bit 3 = 1
22
TACH8
Pin Configuration Register 2
Bit 2 = 1
23
VCCP1
Pin Configuration Register 2
Bits [1:0] = 00
24
VCCP2
Pin Configuration Register 3
Bits [7:6] = 00
25
VR_HOT1
Pin Configuration Register 3
Bits [5:4] = 1×
26
VR_HOT2
Pin Configuration Register 3
Bits [3:2] = 1×
27
FAN2MAX
Pin Configuration Register 3
Bit 1 = 0
281
THERM1
Pin Configuration Register 4
Bits [7:6] = 1×
29
THERM2
Pin Configuration Register 4
Bits [5:4] = 1×
311
PWM1
Pin Configuration Register 4
Bit 3 = 1
321
PWM2
Pin Configuration Register 4
Bit 2 = 1
1 If VIDs are selected, these pins are configured as VIDs. To enable VIDs,
set Bit 7 of Pin Configuration Register 1 (0x01) = 1.
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