- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄165354 > ADSP-TS101SKB2250X (ANALOG DEVICES INC) 64-BIT, 125 MHz, OTHER DSP, PBGA484 PDF資料下載
參數(shù)資料
| 型號： | ADSP-TS101SKB2250X |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 64-BIT, 125 MHz, OTHER DSP, PBGA484 |
| 封裝： | 19 X 19 MM, METRIC, PLASTIC, BGA-484 |
| 文件頁數(shù)： | 9/42頁 |
| 文件大?。?/td> | 774K |
| 代理商： | ADSP-TS101SKB2250X |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
17
REV. PrE
For current information contact Analog Devices at 800/262-5643
ADSP-TS101S
February 2002
PRELIMINARY TECHNICAL DATA
Table 8. Pin Definitions—Flags, Interrupts, and Timer
Signal
Type
Description
FLAG3–0
1
I/O/A
(pd)
FLAG pins. Bidirectional input/output pins can be used as program conditions. Each
pin can be configured individually for input or for output. FLAG3–0 are inputs after
power-up and reset.
IRQ3–02
I/A (pu)
Interrupt Request. When asserted, the DSP generates an interrupt. Each of the
IRQ3–0
pins can be independently set for edge-triggered or level-sensitive operation. After reset,
these pins are disabled unless the
IRQ3–0 strap option and interrupt vectors are
initialized for booting.
TMR0E1
O (pd)
Timer 0 expires. This output pulses for four SCLK cycles whenever timer 0 expires.
At reset this is a strap pin. For more information, see Table 14 on page 19.
A = asynchronous; G = ground; I = input; O = output; o/d = open drain output; P = power supply;
pd = internal pulldown 100 k
; pu = internal pullup 100 k; T = Three-State
1 The internal 100 k
internal pulldown may not be sufficient depending on system noise and/or leakage. A stronger pulldown may be necessary.
2 The internal 100 k
internal pullup may not be sufficient depending on system noise and/or leakage. A stronger pullup may be necessary.
Table 9. Pin Definitions—Link Ports
Signal
Type
Description
L0DAT7–0
1
I/O
Link0 Data 7–0
L1DAT7–0
I/O
Link1 Data 7–0
L2DAT7–0
I/O
Link2 Data 7–0
L3DAT7–0
I/O
Link3 Data 7–0
L0CLKOUT
O
Link0 Clock/Acknowledge Output
L1CLKOUT
O
Link1 Clock/Acknowledge Output
L2CLKOUT
O
Link2 Clock/Acknowledge Output
L3CLKOUT
O
Link3 Clock/Acknowledge Output
L0CLKIN
I/A
Link0 Clock/Acknowledge Input
L1CLKIN
I/A
Link1 Clock/Acknowledge Input
L2CLKIN
I/A
Link2 Clock/Acknowledge Input
L3CLKIN
I/A
Link3 Clock/Acknowledge Input
L0DIR
O
Link0 Direction. (0 = input, 1 = output)
L1DIR
O
Link1 Direction. (0 = input, 1 = output)
L2DIR
2
O (pd)
Link2 Direction. (0 = input, 1 = output)
At reset this is a strap pin. For more information, see Table 14 on page 19.
L3DIR
O (pd)
Link3 Direction. (0 = input, 1 = output)
A = asynchronous; G = ground; I = input; O = output; o/d = open drain output; P = power supply;
pd = internal pulldown 100 k
; pu = internal pullup 100 k; T = Three-State
1 The link port data pins, if connected or floated for extended periods (i.e., token slave with no token master), do not require pullups or pulldowns as there
are no reliability issues and the worst-case power consumption for these floating inputs is negligible. Floating in this case means that these inputs are not
driven by any source and that DC-biased terminations are not present.
2 The internal 100 k
internal pulldown may not be sufficient depending on system noise and/or leakage. A stronger pulldown may be necessary.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADT70GR-REEL7 | ANALOG TEMP SENSOR-VOLTAGE, 2.49-2.51V, 1Cel, RECTANGULAR, SURFACE MOUNT |
| ADT7462ACPZ-500RL7 | DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 4Cel, SQUARE, SURFACE MOUNT |
| ADTSM66SV | KEYPAD SWITCH, SPST, MOMENTARY-TACTILE, 0.05A, 12VDC, 3.92 N, SURFACE MOUNT-STRAIGHT |
| ADTS644N/KV | KEYPAD SWITCH, SPST, MOMENTARY-TACTILE, 0.05A, 12VDC, 1.57 N, THROUGH HOLE-STRAIGHT |
| ADTSM648N/KV | KEYPAD SWITCH, SPST, MOMENTARY-TACTILE, 0.05A, 12VDC, 1.57 N, SURFACE MOUNT-STRAIGHT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-TS201SABP-050 | 功能描述:IC PROCESSOR 500MHZ 576BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:TigerSHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-TS201SABP-060 | 功能描述:IC PROCESSOR 600MHZ 576BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:TigerSHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-TS201SABP-10X | 制造商:Analog Devices 功能描述: |
| ADSP-TS201SABP-15X | 制造商:Analog Devices 功能描述: |
| ADSP-TS201SABP-ENG | 制造商:Analog Devices 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。