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29
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ADSP-TS101S
February 2002
PRELIMINARY TECHNICAL DATA
Output Drive Currents
Figure 15 is a place holder for typical I–V characteristics for the
output drivers of the ADSP-TS101S. The curves in this diagram
will represent the current drive capability of the output drivers as
a function of output voltage.
Power Dissipation
Total power dissipation has two components, one due to internal
circuitry and one due to the switching of external output drivers.
These specifications apply to the internal power portion only
(VDD).
Internal Power Calculation
Internal power dissipation is dependent on the instruction
execution sequence and the data operands involved. The ADSP-
TS101S’s power consumption for a specific application is calcu-
lated according to the following formula, where % is the amount
of time the application spends in that state:
The following power vector definitions apply to the power con-
sumption calculation and the power vector specifications in
I
DDINPEAK—VDD supply current for peak activity
Peak activity is a SIMD quad 16-bit fixed-point multiply,
add, and subtract in parallel with two quad-word data
fetches. The data fetched and operated on are worst case
in terms of power consumption. This vector includes
DMA activity as described below in the IDDINDMA defini-
tion. This represents worst-case processor operation and
is not sustainable under normal application conditions.
I
DDINMAX—VDD supply current for maximum activity
Maximum activity is a SIMD quad 16-bit fixed-point
multiply and add in parallel with two quad-word data
fetches. The data fetched and operated on are random.
This vector includes DMA activity as described below in
the IDDINDMA definition.
I
DDINTYP—VDD supply current for typical activity
Typical activity is a SIMD quad 16-bit fixed-point
compute operation in parallel with two quad-word data
fetches. The data fetched and operated on are random.
This vector includes DMA activity as described below in
the IDDINDMA definition.
I
DDINCTRL—VDD supply current for control activity
Control activity is continuous decision making and
predicted branches. The branch prediction is deliberately
set to be incorrect 50% of the time for equal distribution.
This vector includes DMA activity as described below in
the IDDINDMA definition.
I
DDINDMA—VDD supply current for DMA activity
DMA activity is a single external port DMA from external
to internal memory, quad-word transfers of 32 words
total. The DMA is chained to itself and does not use
interrupts. After setup, the core is not involved, executing
the IDLE instruction only.
Figure 15. ADSP-TS101S Typical Drive Currents
Figure 16. Internal Power PINT Calculation
Dri
ve
Cu
rre
nts
TB
D
% Peak
I
DDINPEAK
×
()
% Maximum
I
DDINMAX
×
()
% Typical
I
DDINT YP
×
()
% Control
I
DDINCTRL
×
()
% DMA
I
DDINDMA
×
()
% Idle
I
DDINIDLE
×
()
+ % Idle Low Power
I
DDINIDL ELP
×
()
Total Current I
DDIN
for V
DD
-------------------------------------------------------------------------------------------------
P
INT
I
DDIN
V
DD
×
=
Table 22. Power Vectors
Parameter
Test Conditions
Max
Unit
IDDINPEAK
TBD
mA
IDDINMAX
TBD
mA
IDDINTYP
TBD
mA
IDDINCTRL
TBD
mA
IDDINDMA
TBD
mA
IDDINIDLE
TBD
mA
IDDINIDLELP
TBD
mA