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CHAPTER 4 INTERFACES
68
4.1.4 Slave Operation
Slave operation is used when the host accesses the direct address register of the
μ
PD98405, or when the
host accesses the control memory, indirect address register, PHY register, or external PHY device via the direct
address register. The following three pins are used to control slave operation.
SR/W_B
(slave read/write - input):
Determines read or write direction for slave access.
SEL_B
(slave select - input):
Selects slave operation of the
μ
PD98405.
ASEL_B
(slave address select - input):
Selects the direct address register of the
μ
PD98405. When a low level is input to the ASEL_B pin, the
μ
PD98405 samples the lower 8 bits of AD31 through AD0 at the rising edge of the system bus clock and
loads them as an address.
The host sets the SEL_B signal to active low to enable slave operation of the
μ
PD98405.
At the same time, the host sets the ASEL_B signal to active low and outputs the address of the direct
address register to be accessed to the AD bus.
The
μ
PD98405 latches an address from AD31 through AD0 at the rising edge of the clock when a low level
is input as the ASEL_B signal. The
μ
PD98405 internally decodes only the lower 8 bits of AD31 through AD0 as
an address, and ignores the higher 24 bits.
At this time, the
μ
PD98405 checks the SR/W_B to determine whether the access direction is read or write.
When data is written to the slave, the
μ
PD98405 latches data on AD31 through AD0 at the rising edge of the
clock immediately before that which makes the SEL_B signal inactive.
When data is read from the slave, the
μ
PD98405 outputs data to AD31 through AD0 at the rising edge of the
clock next to that at which a low level is input as the SEL_B signal. The
μ
PD98405 retains the data output on
AD31 through AD0 until the SEL_B signal goes high.
The user can change the timing of the latching and output of data by extending the low level width of the
SEL_B signal. Figure 4-9 shows slave operation timing.