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CHAPTER 5 SAR FUNCTION
120
5.2 SETTING THE CONTROL MEMORY
The size of the control memory is set to between 0 and 512K words (1 word = 32 bits) depending on the
number of channels supported by the
μ
PD98405. The control memory is divided into the four areas described
below ("1 block" in the following description corresponds to 16 words).
(1) Receive lookup table:
This area stores the "enable bit" and "VC NUMBER" according to the pattern of the receive VPI/VCI. This
area can consist of up to 2,048 blocks, the actual value depending on the supported receive VPI/VCI. For
details, see
Section 5.5.4
.
(2) Receive free buffer pool pointer:
This area saves "pool descriptors." The size of this area differs depending on the number of pools set.
Because up to 32 two-word descriptors can be set, a maximum of four blocks are occupied. For details,
see
Section 5.5.2 (2)
.
(3) ABR lookup table:
This area is used by the
μ
PD98405 to save the "VC NUMBER" of the channel (VC) selected by the ABR
scheduler. This area can consist of up to 8 blocks, the actual value depending on the number of supported
active ABR channels. The
μ
PD98405 supports two active ABR channels per word. The host need not
access this area. It is used only by the
μ
PD98405.
(4) Free block pool:
This area saves the transmit/receive VC tables. The size of this area differs depending on the number of
VC tables set, but fills within a range of 0 to 32K blocks. Because one transmit/receive VC table uses one
block (16 words), 32 blocks are occupied when sixteen transmit/receive channels are set.
For details, see
Sections
5.4.3
and
5.5.3
.