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CHAPTER 7 REGISTERS
322
7.4 PHY REGISTER
(1) PHY command register 1 (PCMR1)
This register is used to set transmission of the Line AIS, Path AIS, Line RDI(FERF), and Path RDI(FERF)
alarms, as well as the PHYALM pin output.
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Address
Default
R/W
PCMR1
0
0
0
ALM
LAIS
PAIS
LRDI
PRDI
00H
00H
R/W
Field
Function
Default value
Sets the output level of the PHYALM pin when the CMD bit of the AMR1
register is not masked.
1
Sets the PHYALM pin output to high level.
0
The PHYALM pin output is not set.
Used to set Line AIS transmission.
1
Sets Line AIS transmission. Changes the K2 byte (bit 6 to bit 8) of the
transmission frame to 111 and, before scrambling all bytes other than
the section overhead byte, changes all the bits of the transmission frame
to 1.
0
Line AIS is not set.
Used to set Path AIS transmission.
1
Sets Path AIS transmission. Changes all the bits of H1 to H3 of the
transmission frame, as well as all the bits of the payload area, to 1.
0
Path AIS is not set.
Used to set Line RDI transmission.
1
Sets Line RDI transmission. Changes the K2 byte (bit 6 to bit 8) of the
transmission frame to 110.
0
Line RDI is not set.
Used to set Path RDI transmission.
1
Sets Path RDI transmission. Changes bit 5 of the G1 byte of the
transmission frame to 1.
0
Path RDI is not set.
Bit 4: ALM
0
Bit 3: LAIS
0
Bit 2: PAIS
0
Bit 1: LRDI
0
Bit 0: PRDI
0
Remarks 1
. If both Line AIS and Line RDI are set for the same frame, Line AIS takes priority.
2
. Upon reading this register, 0 will be returned for the high-order three bits. It is not possible to
write to the high-order three bits.