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CHAPTER 7 REGISTERS
333
(12) Performance cause mask register (PCMR)
This register is used to set masking of the performance detailed cause of PCR (address: 0AH). When
masking is applied, the PFM bit of PICR (address: 06H) is not set.
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Address
Default
R/W
PCMR
0
0
FJ
B1E
B2E
B3E
LFEB PFEB
0BH
00H
R/W
Field
Function
Default value
Used to set masking of the notification of FJ (Frequency Justification)
application.
1
Does not mask notification of FJ application.
0
Masks notification of FJ application.
Used to set masking of the notification of B1 error detection.
1
Does not mask notification of B1 error detection.
0
Masks notification of B1 error detection.
Used to set masking of the notification of B2 error detection.
1
Does not mask notification of B2 error detection.
0
Masks notification of B2 error detection.
Used to set masking of the notification of B3 error detection.
1
Does not mask notification of B3 error detection.
0
Masks notification of B3 error detection.
Used to set masking of the notification of Line FEBE detection.
1
Does not mask notification of Line FEBE detection.
0
Masks notification of Line FEBE detection.
Used to set masking of the notification of Path FEBE detection.
1
Does not mask notification of Path FEBE detection.
0
Masks notification of Path FEBE detection.
D5: FJ
0
D4: B1E
0
D3: B2E
0
D2: B3E
0
D1: LFEB
0
D0: PFEB
0
Remark
Upon reading this register, 0 will be returned for the high-order two bits. It is not possible to write
to the high-order two bits.