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CHAPTER 5 SAR FUNCTION
255
5.12 INTERRUPT FUNCTION
The
μ
PD98405 has one open-drain interrupt output pin (INTR_B). This pin can be set to active status by
several sources. Each interrupt source is allocated to the corresponding bit of the GSR register. When an
interrupt source is generated, the corresponding bit of this register is set to 1.
The bits of the GSR register correspond to the bits of each interrupt mask register IMR. When a bit of the
GSR register is set, the interrupt pin becomes active only when the corresponding bit of the IMR register is set
to 1.
An interrupt can also be activated by setting the corresponding IMR register bit to 1, thus unmasking the
interrupt, when the corresponding bit of the GSR register has already been set to 1.
The GSR register is cleared to 0 each time it has been read by the host. If the same interrupt source is
generated when an interrupt has been issued and before the host clears the GSR register by reading it, the bit
of the GSR register is overwritten to 1.
After a reset, all the bits of the GSR and IMR registers are cleared to 0, and all the interrupt sources are
masked.
Of the 32 bits of the GSR register, the PI bit for PHY interrupt is used to input an interrupt of an external
device such as internal and external PHY layer devices. When the PHY interrupt becoming active is detected,
the PI bit is set, and the interrupt is issued to the host. In response, the host issues the Indirect_Access
command, accesses the PHY registers or the register of the external PHY layer device, and reads the detailed
interrupt source as data.
For details of the GSR and IMR registers, see
Sections 7.2 (2)
and
(3)
.