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CHAPTER 7 REGISTERS
358
(37) Drop cell header pattern register (DCHPR)
This register is used to set which cells are to be discarded. The user can set the discarding of idle cells or
unassigned cells. When both idle cells and unassigned cells are to be discarded, this can be set using the
DCHPMR register.
Register name
D7
D6
D5
D4
D3
D2
D1
D0
Address
Default
R/W
DCHPR
0
0
0
0
0
0
0
CLP
27H
01H
R/W
Field
Function
Default value
Used for comparison with the CLP field of a receive cell.
1
Idle cells are to be discarded.
When all the bits of the area between the first and fourth bytes of a
received cell’s header, with the exception of the CLP field, are set to 0,
and provided the CLP bit is set to 1, that cell is discarded.
0
Unassigned cells are to be discarded.
When all the bits of the area between the first and fourth bytes of a
received cell’s header, with the exception of the CLP field, are set to 0,
and provided the CLP bit is set to 0, that cell is discarded.
D0: CLP
1
The
μ
PD98405 performs a pattern check on the header of a received cell before storing that cell into the
receive FIFO. The CLP bit of this register corresponds to the CLP bit of the fourth byte of the header.
When all the bits of the receive cell header area, with the exception of the CLP field, are set to 0, the CLP
field of the cell is compared with the CLP bit of this register. When the values match, the cell is discarded.
Because the default value of this register’s CLP bit is 1, an idle cell (empty cell) having a header pattern of
"00H, 00H, 00H, 01H" is discarded after initialization.
Remark
The high-order seven bits of this register can be written. Set these bits to 0.