
XRT86SH328
PRELIMINARY
240
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
REV. P1.0.6
BIT 4 - Change of DS2 LOF Defect Condition Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change of DS2 LOF Defect Condition Interrupt for
DS2 Channel 1. If the user enables this interrupt, then the M12 De-MUX block will generate an interrupt in response to
either of the following conditions.
Whenever the M12 De-MUX block declares the DS2 LOF Defect condition, or
Whenever the M12 De-MUX block clears the DS2 LOF Defect condition.
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0 - Disables the Change of DS2 LOF Defect Condition Interrupt for DS2 Channel 1.
1 - Enables the Change of DS2 LOF Defect Condition Interrupt for DS2 Channel 1.
BIT 3 - Change of DS2 FERF/RDI Defect Condition Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change of DS2 FERF/RDI Defect Condition Interrupt
for DS2 Channel 1. If the user enables this interrupt, then the M12 De-MUX block will generate an interrupt in response
to either of the following conditions.
Whenever the M12 De-MUX block declares the DS2 FERF/RDI Defect condition, or
Whenever the M12 De-MUX block clears the DS2 FERF/RDI Defect condition.
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0 - Disables the Change of DS2 FERF/RDI Defect Condition Interrupt for DS2 Channel 1.
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1 - Enables the Change of DS2 FERF/RDI Defect Condition Interrupt for DS2 Channel 1.
BIT 2 - Change of DS2 RED Alarm Defect Condition Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change of DS2 RED Alarm Defect Condition Interrupt
for DS2 Channel 1. If the user enables this interrupt, then the M12 De-MUX block will generate an interrupt in response
to either of the following conditions.
Whenever the M12 De-MUX block declares the DS2 RED Alarm Defect condition, or
Whenever the M12 De-MUX block clears the DS2 RED Alarm Defect condition.
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0 - Disables the Change of DS2 RED Alarm Defect Condition Interrupt for DS2 Channel 1.
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1 - Enables the Change of DS2 RED Alarm Defect Condition Interrupt for DS2 Channel 1.
BIT 1 - Change of DS2 AIS Defect Condition Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change of DS2 AIS Defect Condition Interrupt for
DS2 Channel 1. If the user enables this interrupt, then the M12 De-MUX block will generate an interrupt in response to
either of the following conditions.
Whenever the M12 De-MUX block declares the DS2 AIS Defect condition, or
Whenever the M12 De-MUX block clears the DS2 AIS Defect condition.
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0 - Disables the Change of DS2 AIS Defect Condition Interrupt for DS2 Channel 1.
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1 - Enables the Change of DS2 AIS Defect Condition Interrupt for DS2 Channel 1.
BIT 0 - Change of State of Reserved Bit (G.747) Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change of State of the G.747 Reserved Bit Interrupt.
If the user enables this interrupt, then the M12 De-MUX block will generate an interrupt anytime it detects a change of
state in the Reserved Bit within the G.747 Data Stream associated with G.747 Channel # 1.
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0 - Disables the Change of State of the G.747 Reserved Bit Interrupt for M12 De-MUX Block Channel 1.
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1 - Enables the Change of State of the G.747 Reserved Bit Interrupt for M12 De-MUX Block Channel 1.
N
OTE
:
This bit-field is only active if M12 De-MUX Block # 1 has been configured to operate in the G.747 Mode.