
XRT86SH328
PRELIMINARY
VII
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
REV. P1.0.6
T
ABLE
328: DS3 F
RAMER
B
LOCK
- LCV O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- LSB (A
DDRESS
= 0
X
0E6F) ............................ 229
T
ABLE
329: DS3 F
RAMER
B
LOCK
- P-B
IT
E
RROR
O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- MSB (A
DDRESS
= 0
X
0E70) .............. 229
T
ABLE
330: DS3 F
RAMER
B
LOCK
- P-B
IT
E
RROR
O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- LSB (A
DDRESS
= 0
X
0E71) ............... 230
T
ABLE
331: DS3 F
RAMER
B
LOCK
- CP-B
IT
E
RROR
O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- MSB (A
DDRESS
= 0
X
0E72) ............ 230
T
ABLE
332: DS3 F
RAMER
B
LOCK
- CP-B
IT
E
RROR
O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- LSB (A
DDRESS
= 0
X
0E73) ............. 230
T
ABLE
333: DS3 F
RAMER
B
LOCK
- T
RANSMIT
LAPD B
YTE
C
OUNT
R
EGISTER
(A
DDRESS
= 0
X
0E83) ............................................. 231
T
ABLE
334: DS3 F
RAMER
B
LOCK
- R
ECEIVE
LAPD B
YTE
C
OUNT
R
EGISTER
(A
DDRESS
= 0
X
0E84) ............................................... 231
T
ABLE
335: DS3 F
RAMER
B
LOCK
- R
ECEIVE
DS2 L
OOP
-B
ACK
R
EQUEST
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0E90) ..... 231
T
ABLE
336: DS3 F
RAMER
B
LOCK
- R
ECEIVE
DS2 L
OOP
-B
ACK
R
EQUEST
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0E91) ..... 232
T
ABLE
337: DS3 F
RAMER
B
LOCK
- R
ECEIVE
DS2 L
OOP
-
BACK
R
EQUEST
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0E92) ....................... 233
T
ABLE
338: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
I
NTERRUPT
S
TATUS
/E
NABLE
R
EGISTER
- 1 (A
DDRESS
= 0
X
0E93) ................. 234
T
ABLE
339: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
S
TATUS
R
EGISTERS
- 1 (A
DDRESS
= 0
X
0E94) ............................................. 235
T
ABLE
340: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
I
NTERRUPT
S
TATUS
/E
NABLE
R
EGISTER
- 2 (A
DDRESS
= 0
X
0E95) ................. 235
T
ABLE
341: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
S
TATUS
R
EGISTERS
- 2 (A
DDRESS
= 0
X
0E96) ............................................. 236
T
ABLE
342: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
I
NTERRUPT
S
TATUS
/E
NABLE
R
EGISTER
- 3 (A
DDRESS
= 0
X
0E97) ................. 236
T
ABLE
343: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
S
TATUS
R
EGISTERS
- 3 (A
DDRESS
= 0
X
0E98) ............................................. 236
T
ABLE
344: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
I
NTERRUPT
S
TATUS
/E
NABLE
R
EGISTER
- 4 (A
DDRESS
= 0
X
0E99) ................. 237
T
ABLE
345: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
S
TATUS
R
EGISTERS
- 4 (A
DDRESS
= 0
X
0E9A) ............................................. 237
T
ABLE
346: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
I
NTERRUPT
S
TATUS
/E
NABLE
R
EGISTER
- 5 (A
DDRESS
= 0
X
0E9B) ................. 237
T
ABLE
347: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
S
TATUS
R
EGISTERS
- 5 (A
DDRESS
= 0
X
0E9C) ............................................. 238
T
ABLE
348: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
I
NTERRUPT
S
TATUS
/E
NABLE
R
EGISTER
- 6 (A
DDRESS
= 0
X
0E9D) ................ 238
T
ABLE
349: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
S
TATUS
R
EGISTERS
- 6 (A
DDRESS
= 0
X
0E9E) ............................................. 238
T
ABLE
350: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
I
NTERRUPT
S
TATUS
/E
NABLE
R
EGISTER
- 7 (A
DDRESS
= 0
X
0E9F) ................. 239
T
ABLE
351: DS3 F
RAMER
B
LOCK
- M12 L
OOP
-
BACK
S
TATUS
R
EGISTERS
- 7 (A
DDRESS
= 0
X
0EA0) ............................................. 239
T
ABLE
352: DS3 F
RAMER
B
LOCK
- DS2 # 1 F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0EA1) ................................. 239
T
ABLE
353: DS3 F
RAMER
B
LOCK
- DS2 # 1 F
RAMER
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EA2) ................................. 241
T
ABLE
354: DS3 F
RAMER
B
LOCK
- DS2 # 1 F
RAMER
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EA3) ................................................... 242
T
ABLE
355: DS3 F
RAMER
B
LOCK
- DS2 # 2 F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0EA4) ................................. 243
T
ABLE
356: DS3 F
RAMER
B
LOCK
- DS2 # 2 F
RAMER
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EA5) ................................. 243
T
ABLE
357: DS3 F
RAMER
B
LOCK
- DS2 # 2 F
RAMER
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EA6) ................................................... 243
T
ABLE
358: DS3 F
RAMER
B
LOCK
- DS2 # 3 F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0EA7) ................................. 244
T
ABLE
359: DS3 F
RAMER
B
LOCK
- DS2 # 3 F
RAMER
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EA8) ................................. 244
T
ABLE
360: DS3 F
RAMER
B
LOCK
- DS2 # 3 F
RAMER
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EA9) ................................................... 244
T
ABLE
361: DS3 F
RAMER
B
LOCK
- DS2 # 4 F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0EAA) ................................. 245
T
ABLE
362: DS3 F
RAMER
B
LOCK
- DS2 # 4 F
RAMER
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EAB) ................................. 245
T
ABLE
363: DS3 F
RAMER
B
LOCK
- DS2 # 4 F
RAMER
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EAC) .................................................. 245
T
ABLE
364: DS3 F
RAMER
B
LOCK
- DS2 # 5 F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0EAD) ................................. 246
T
ABLE
365: DS3 F
RAMER
B
LOCK
- DS2 # 5 F
RAMER
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EAE) ................................. 246
T
ABLE
366: DS3 F
RAMER
B
LOCK
- DS2 # 5 F
RAMER
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EAF) ................................................... 246
T
ABLE
367: DS3 F
RAMER
B
LOCK
- DS2 # 6 F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0EB0) ................................. 247
T
ABLE
368: DS3 F
RAMER
B
LOCK
- DS2 # 6 F
RAMER
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EB1) ................................. 247
T
ABLE
369: DS3 F
RAMER
B
LOCK
- DS2 # 6 F
RAMER
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EB2) ................................................... 247
T
ABLE
370: DS3 F
RAMER
B
LOCK
- DS2 # 7 F
RAMER
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0EB3) ................................. 248
T
ABLE
371: DS3 F
RAMER
B
LOCK
- DS2 # 7 F
RAMER
I
NTERRUPT
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EB4) ................................. 248
T
ABLE
372: DS3 F
RAMER
B
LOCK
- DS2 # 7 F
RAMER
S
TATUS
R
EGISTER
(A
DDRESS
= 0
X
0EB5) ................................................... 248
T
ABLE
373: DS3 F
RAMER
B
LOCK
- M13 D
E
-MUX R
EGISTER
(A
DDRESS
= 0
X
0EB8) ..................................................................... 249
2.12 T1/E1 LIU CHANNEL CONTROL REGISTERS............................................................................................ 249
T
ABLE
374: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N000) ..................................................................................... 249
T
ABLE
375: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N001) ...................................................................................... 250
T
ABLE
376: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N002) ...................................................................................... 251
T
ABLE
377: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N003) ...................................................................................... 252
T
ABLE
378: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N004) ...................................................................................... 253
T
ABLE
379: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N005) ...................................................................................... 253
T
ABLE
380: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N006) ...................................................................................... 254
T
ABLE
381: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N007) ...................................................................................... 255
T
ABLE
382: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N008) ...................................................................................... 256
T
ABLE
383: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N009) ...................................................................................... 256
T
ABLE
384: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N00A) ...................................................................................... 256
T
ABLE
385: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N00B) ...................................................................................... 257
T
ABLE
386: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N00C) ...................................................................................... 257
T
ABLE
387: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N00D) ...................................................................................... 257
T
ABLE
388: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N00E) ...................................................................................... 258
T
ABLE
389: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N00F) ...................................................................................... 258
T
ABLE
390: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N010) ...................................................................................... 258
T
ABLE
391: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N011) ...................................................................................... 259
2.13 DS1/E1 FRAMER BLOCK REGISTERS - DS1 APPLICATIONS ................................................................. 259