
PRELIMINARY
XRT86SH328
221
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
condition.
`
1 - Configures all Egress Direction Transmit DS1/E1 Framer blocks to automatically transmit the DS1/E1 AIS
indicators via the downstream DS1/E1 signals anytime the Receive DS3 Framer block declares the LOS defect
condition.
N
OTE
:
This bit-field is only active if the XRT86SH328 has been configured to operate in either the M13 MUX or the
M13 MUX which is Asynchronously mapped into STS-1/STS-3 Mode.
BIT 3 - Unused
BIT 2 - Auto DS1/E1 AIS upon DS3 OOF Defect
This READ/WRITE bit-field is used to configure all of the Egress Direction Transmit DS1/E1 Framer blocks (within the
XRT86SH328) to automatically transmit the DS1/E1 AIS indicator via the downstream DS1/E1 signals, anytime (and for
the duration that) the Receive DS3 Framer block declares the LOF/OOF defect condition.
`
0 - Does not configure all Egress Direction Transmit DS1/E1 Framer blocks to automatically transmit the DS1/E1 AIS
indicators via the downstream DS1/E1 signals, anytime the Receive DS3 Framer block declares the LOF/OOF defect
condition.
`
1 - Configures all Egress Direction Transmit DS1/E1 Framer blocks to automatically transmit the DS1/E1 AIS
indicators via the downstream DS1/E1 signals anytime the Receive DS3 Framer block declares the LOF/OOF defect
condition.
N
OTE
:
This bit-field is only active if the XRT86SH328 has been configured to operate in either the M13 MUX or the
M13 MUX which is Asynchronously mapped into STS-1/STS-3 Mode.
BIT 1 - Unused
BIT 0 - Auto DS1/E1 AIS upon DS3 AIS Defect
This READ/WRITE bit-field is used to configure all of the Egress Direction Transmit DS1/E1 Framer blocks (within the
XRT86SH328) to automatically transmit the DS1/E1 AIS indicator via the downstream DS1/E1 signals, anytime (and for
the duration that) the Receive DS3 Framer block declares the AIS defect condition.
`
0 - Does not configure all Egress Direction Transmit DS1/E1 Framer blocks to automatically transmit the DS1/E1 AIS
indicators via the downstream DS1/E1 signals, anytime the Receive DS3 Framer block declares the AIS defect
condition.
`
1 - Configures all Egress Direction Transmit DS1/E1 Framer blocks to automatically transmit the DS1/E1 AIS
indicators via the downstream DS1/E1 signals anytime the Receive DS3 Framer block declares the AIS defect
condition.
N
OTE
:
This bit-field is only active if the XRT86SH328 has been configured to operate in either the M13 MUX or the
M13 MUX which is Asynchronously mapped into STS-1/STS-3 Mode.
BIT [7:0] - PMON EXZ_Event_Count[15:8]:
These RESET-upon-READ bits, along with that within the PMON Excessive Zero Count Register - LSB combine to
reflect the cumulative number of instances in which the Receive DS3 Framer block has detected a string of three or
more consecutive zeros within the incoming DS3 data-stream, since the last read of this register.
This register contains the Most Significant Byte of this 16-bit expression.
T
ABLE
298: DS3 F
RAMER
B
LOCK
- PMON E
XCESSIVE
Z
ERO
(EXZ) E
VENT
C
OUNT
R
EGISTER
- MSB (A
DDRESS
=
0
X
0E4E)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
PMON EXZ Event Count[15:8]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0