
PRELIMINARY
XRT86SH328
193
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
an interrupt in response to either of the following events.
The instant that the Receive DS3 Framer block declares the AIS defect condition.
The instant that the Receive DS3 Framer block clears the AIS defect condition.
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0 - Disables the Change in AIS Defect Condition interrupt.
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1 - Enables the Change in DS3 AIS Defect Condition Interrupt.
BIT 4 - Change of DS3 Idle Condition Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change in DS3 Idle Condition interrupt, within the
Receive DS3 Framer block. If the user enables this interrupt then the Receive DS3 Framer block will generate an
interrupt in response to either of the following conditions.
The instant that the Receive DS3 Framer block detects and declares the DS3 Idle condition.
The instant that the Receive DS3 Framer block clears the DS3 Idle condition.
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0 - Disables the Change in DS3 Idle Condition Interrupt.
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1 - Enables the Change in DS3 Idle Condition Interrupt.
BIT 3 - Change of DS3 FERF/RDI Defect Condition Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change in DS3 FERF/RDI Defect Condition Interrupt.
If this interrupt is enabled, then the Receive DS3 Framer block will generate an interrupt in response to either of the
following condition.
The instant that the Receive DS3 Framer block declares the FERF/RDI defect condition.
The instant that the Receive DS3 Framer block clears the FERF/RDI defect condition.
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0 - Disables the Change in DS3 FERF/RDI Defect Condition Interrupt.
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1 - Enables the Change in DS3 FERF/RDI Defect Condition Interrupt.
BIT 2 - Change of AIC State Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change in AIC State interrupt. If this interrupt is
enabled, then the Receive DS3 Framer block will generate an interrupt in response to it detecting a change in the AIC
bit-field, within the incoming DS3 data-stream.
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0 - Disables the Change of AIC State Interrupt.
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1 - Enables the Change of AIC State Interrupt.
BIT 1 - Change of DS3 OOF Defect Condition Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change of DS3 OOF Defect Condition
Interrupt. If this interrupt is enabled, then the Receive DS3 Framer block will generate an interrupt in response
to either of the following conditions.
The instant that the Receive DS3 Framer block declares the DS3 OOF Defect Condition.
The instant that the Receive DS3 Framer block cleares the DS3 OOF Defect Condition.
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0 - Disables the Change in DS3 OOF Defect Condition Interrupt.
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1 - Enables the Change in DS3 OOF Defect Condition Interrupt.
BIT 0 - Detection of P-Bit Error Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Detection of P-Bit Error Interrupt. If this
interrupt is enabled, then the Receive DS3 Framer block will generate an interrupt anytime it detects P-bit
errors within the incoming DS3 data-stream.
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0 - Disables the Detection of P-Bit Error Interrupt
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1 - Enables the Detection of P-Bit Error Interrupt