參數(shù)資料
型號: TSB12C01APZ
廠商: Texas Instruments, Inc.
英文描述: High-Speed Serial-Bus Link-Layer Controller
中文描述: 高速串行總線鏈路層控制器
文件頁數(shù): 45/59頁
文件大?。?/td> 275K
代理商: TSB12C01APZ
6–1
6 Parameter Measurement Information
tw1(L)
50%
50%
BCLK
tw1(H)
50%
tc1
Figure 6–1. BCLK Waveform
tsu1
tsu2
tsu3
tsu4
th1
th2
th3
th4
td1
td2
50%
50%
50%
50%
50%
50%
50%
BCLK
DATA0 – DATA31
ADDR0 – ADDR7
CA
(see Note A)
WR
CS
NOTE A: When back-to-back write cycles are done, a maximum of 9 BCLK cycles may be required after the falling edge
of CS before CA is asserted (low). DATA0 – DATA31, ADDR0 – ADDR7, and WR need to remain valid until
CA is asserted (low). These cycles are to synchronize data passing between the BCLK and SCLK clock
domains.
Figure 6–2. Host-Interface Write-Cycle Waveforms
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSB12C01AWN 制造商:TI 制造商全稱:Texas Instruments 功能描述:High-Speed Serial-Bus Link-Layer Controller
TSB12LV01A 制造商:Texas Instruments 功能描述:
TSB12LV01AIPZ 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 (Firewire) Bus Interface/Controller
TSB12LV01APZ 制造商:TI 制造商全稱:Texas Instruments 功能描述:High-Speed Serial-Bus Link-Layer Controller
TSB12LV01B 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394-1995 HIGH SPEED SERIAL BUS LINK LAYER CONTROLLER