參數(shù)資料
型號(hào)： TSB12C01APZ
廠商： Texas Instruments, Inc.
英文描述： High-Speed Serial-Bus Link-Layer Controller
中文描述： 高速串行總線鏈路層控制器
文件頁數(shù)： 19/59頁
文件大?。?/td> 275K
代理商： TSB12C01APZ
3–3
Table 3–1. Version/Revision Register Field Descriptions
BITS
ACRONYM
FUNCTION NAME
DESCRIPTION
0–15
Version
Version
Version of the TSB12C01A
16–31
Revision
Revision
Revision of the TSB12C01A
3.2.2
The node-address/transmitter acknowledge register controls which packets are accepted/rejected, and it
presents the last acknowledge received for packets sent from the ATF. This register is at offset 04h. The
bus number and node number fields are read/write. The AT acknowledge (ATAck) received is normally read
only. Setting the regRW bit in the diagnostic register makes these fields read/write. The initial value is
FFFF_0000h.
Node-Address/Transmitter Acknowledge Register
Table 3–2. Node-Address/Transmitter Acknowledge Register Field Descriptions
BITS
ACRONYM
FUNCTION NAME
DESCRIPTION
0–9
BusNumber
Bus number
BusNumber is the 10-bit IEEE 1212 bus number that the
TSB12C01A uses with the node number in the SOURCE address
for outgoing packets and to accept or reject incoming packets. The
TSB12C01A always accepts packets with a bus number equal to
3FFh.
10–15
NodeNumber
Node number
NodeNumber is the 6-bit node number that the TSB12C01A uses
with the bus number in the source address for outgoing packets and
to accept or reject incoming packets. The TSB12C01A always
accepts packets with the node address equal to 3Fh. See
BlkBusDep bits in Table 3–3 for exceptions.
16–23
Reserved
Reserved
Reserved
24–27
ATAck
Address transmitter
acknowledge
received
ATAck is the last acknowledge received by the transmitting node in
response to a packet sent from the asynchronous transmit-FIFO.
When an acknowledge time out occurs, the value written to ATAck
is 0h. See Table 6–13 in IEEE 1394-1995 standard for acknowledge
codes.
28–31
Reserved
Reserved
Reserved
3.2.3
The control register dictates the basic operation of the TSB12C01A. This register is at address 08h and is
read/write. The initial value is 0000_0000h.
Control Register
Table 3–3. Control-Register Field Descriptions
BITS
ACRONYM
FUNCTION NAME
DESCRIPTION
0
IdVal
ID Valid
When IdVal is set, the TSB12C01A accepts packets addressed to
the IEEE 1212 address set (Node Number) in the node-address
register. When IdVal is cleared, the TSB12C01A accepts only
broadcast packets.
1
RxSId
Received self-ID
packets
When RxSId is set, the self-identification packets generated by phy
chips during bus initialization are received and placed into the GRF
as a single packet. Each self-identification packet is composed of
two quadlets, where the second quadlet is the logical inverse of the
first. If ACK (4 bits) equals 1h, then the data is good. If ACK equals
Dh, then the data is wrong.
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