參數(shù)資料
型號(hào): TMP20F2810PBKAEP
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: Digital Signal Processors
中文描述: 數(shù)字信號(hào)處理器
文件頁數(shù): 72/159頁
文件大小: 2084K
代理商: TMP20F2810PBKAEP
Peripherals
72
March 2004 Revised October 2004
SGUS051A
Figure 49 shows the block diagram of the McBSP module with FIFO, interfaced to the F281x and C281x
version of Peripheral Frame 2.
McBSP Receive
Interrupt Select Logic
DX
DR
Expand Logic
DRR1 Receive Buffer
RX FIFO
Interrupt
DRR2 Receive Buffer
RX FIFO Registers
RBR1 Register
RBR2 Register
McBSP Registers
and Control Logic
CLKX
FSX
CLKR
FSR
16
Compand Logic
DXR2 Transmit Buffer
RSR1
XSR2
XSR1
Peripheral Read Bus
16
16
16
16
16
RSR2
DXR1 Transmit Buffer
16
LSPCLK
MRINT
To CPU
McBSP
RX Interrupt Logic
RX FIFO _15
RX FIFO _1
RX FIFO _0
RX FIFO _15
RX FIFO _1
RX FIFO _0
McBSP Transmit
Interrupt Select Logic
TX FIFO
Interrupt
TX FIFO Registers
MXINT
To CPU
TX Interrupt Logic
16
16
16
TX FIFO _15
TX FIFO _1
TX FIFO _0
TX FIFO _15
TX FIFO _1
TX FIFO _0
Peripheral Write Bus
Figure 49. McBSP Module With FIFO
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