參數(shù)資料
型號: TMP20F2810PBKAEP
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors
中文描述: 數(shù)字信號處理器
文件頁數(shù): 142/159頁
文件大?。?/td> 2084K
代理商: TMP20F2810PBKAEP
Electrical Specifications
140
March 2004 Revised October 2004
SGUS051A
Analog Input on
Channel Ax or Bx
ADC Clock
Sample and Hold
SH Pulse
SMODE Bit
tdschx_n
tdschx_n+1
Sample n
Sample n+1
Sample n+2
tSH
ADC Event Trigger
from EV or Other
Sources
td(SH)
Figure 639. Sequential Sampling Mode (Single-Channel) Timing
Table 642. Sequential Sampling Mode Timing
SAMPLE n
SAMPLE n + 1
AT 25-MHz ADC
CLOCK,
tc(ADCCLK) = 40 ns
REMARKS
td(SH)
Delay time from event
trigger to sampling
2.5tc(ADCCLK)
tSH
Sample/Hold width/
Acquisition width
(1 + Acqps) *
tc(ADCCLK)
40 ns with Acqps = 0
Acqps value = 015
ADCTRL1[8:11]
td(schx_n)
Delay time for first result
to appear in the Result
register
4tc(ADCCLK)
160 ns
td(schx_n+1)
Delay time for successive
results to appear in the
Result register
(2 + Acqps) *
tc(ADCCLK)
80 ns
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