參數(shù)資料
型號: TMP20F2810PBKAEP
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors
中文描述: 數(shù)字信號處理器
文件頁數(shù): 105/159頁
文件大?。?/td> 2084K
代理商: TMP20F2810PBKAEP
Electrical Specifications
105
March 2004 Revised October 2004
SGUS051A
6.16
Low-Power Mode Wakeup Timing
Table 610 is also the IDLE Mode Wake-Up Timing Requirements table.
Table 610. IDLE Mode Switching Characteristics
PARAMETER
TEST CONDITIONS
Without input qualifier
MIN
TYP
MAX
UNIT
Cycles
tw(WAKE-INT)
Pulse duration, external wake-up
signal
2 * tc(SCO)
With input qualifier
1 * tc(SCO) + IQT
Cycles
Delay time, external wake signal to
program execution resume
Wake-up from Flash
Flash module in active state
Without input qualifier
8 * tc(SCO)
Cycles
td(WAKE-IDLE)
Wake-up from Flash
Flash module in active state
With input qualifier
8 * tc(SCO) + IQT
Cycles
Wake-up from Flash
Flash module in sleep state
Without input qualifier
1050*tc(SCO)
Cycles
Wake-up from Flash
Flash module in sleep state
With input qualifier
1050 * tc(SCO) + IQT
Cycles
Wake-up from SARAM
Wake-up from SARAM
Without input qualifier
With input qualifier
8 * tc(SCO)
Cycles
Cycles
8 * tc(SCO) + IQT
Input Qualification Time (IQT) = [5 x QUALPRD x 2] * tc(SCO)
This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. Execution of an ISR (triggered by the
wake-up) signal involves additional latency.
WAKE INT
XCLKOUT
A0A15
td(WAKEIDLE)
XCLKOUT = SYSCLKOUT
WAKE INT can be any enabled interrupt, WDINT, XNMI, or XRS.
tw(WAKEINT)
Figure 613. IDLE Entry and Exit Timing
Table 611 is also the STANDBY Mode Wake-Up Timing Requirements table.
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