- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383938 > TCP pentium processor (Intel Corp.) 32-Bit CPU with 64-Bit Data Bus(帶64位數(shù)據(jù)總線32位CPU) PDF資料下載
參數(shù)資料
| 型號(hào)： | TCP pentium processor |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit CPU with 64-Bit Data Bus(帶64位數(shù)據(jù)總線32位CPU) |
| 中文描述： | 32位與64位數(shù)據(jù)總線（帶64位數(shù)據(jù)總線32位的CPU中央處理器） |
| 文件頁數(shù)： | 7/49頁 |
| 文件大?。?/td> | 947K |
| 代理商： | TCP PENTIUM PROCESSOR |
第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
E
PENTIUM
PROCESSOR WITH VOLTAGE REDUCTION TECHNOLOGY
7
Table 1. Signals Removed in Pentium
Processor with Voltage Reduction Technology
Signal
Function
ADSC#
Additional Address Status. This signal is mainly used for large or standalone L2
cache memory subsystem support required for high-performance desktop or server
models.
BRDYC#
Additional Burst Ready. This signal is mainly used for large or standalone L2 cache
memory subsystem support required for high-performance desktop or server
models.
CPUTYP
CPU Type. This signal is used for dual processing systems.
D/P#
Dual/Primary processor identification. This signal is only used for an upgrade
processor.
FRCMC#
Functional Redundancy Checking. This signal is only used for error detection via
processor redundancy, and requires two Pentium
processors (master/checker).
PBGNT#
Private Bus Grant. This signal is only used for dual processing systems.
PBREQ#
Private Bus Request. This signal is used only for dual processing systems.
PHIT#
Private Hit. This signal is only used for dual processing systems.
PHITM#
Private Modified Hit. This signal is only used for dual processing systems.
PICCLK
APIC Clock. This signal is the APIC interrupt controller serial data bus clock.
PICD0
[DPEN#]
APIC’s Programmable Interrupt Controller Data line 0. PICD0 shares a pin with
DPEN# (Dual Processing Enable).
PICD1
[APICEN]
APIC’s Programmable Interrupt Controller Data line 1. PICD1 shares a pin with
APICEN (APIC Enable (on RESET)).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TCS426 | Dual Power MOSFET Drivers |
| TCS426CPA | Dual Power MOSFET Drivers |
| TCS426CSA | Dual Power MOSFET Drivers |
| TCS426MJA | Dual Power MOSFET Drivers |
| TCS427 | Dual Power MOSFET Drivers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TCPR01 | 制造商: 功能描述: 制造商:ARCO ELECTRONICS 功能描述: |
| TCPS2 | 制造商:Apex Tool Group 功能描述:SPRING 4521000001 REPM'T PLIERS/ |
| TCPSERIES | 制造商:AVX 制造商全稱:AVX Corporation 功能描述:TCP Series Low ESR Tantalum Modules |
| TCP-SERIES | 制造商:AVX 制造商全稱:AVX Corporation 功能描述:TCP Series Low ESR Tantalum Modules |
| TCPSMTP | 制造商:CMX Systems 功能描述:Simple Mail Transfer Protocol |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。