參數(shù)資料
型號(hào)： T7234A
英文描述： Compliance with the New ETSI PSD Requirement
中文描述： 符合新的ETSI PSD的要求
文件頁(yè)數(shù)： 112/116頁(yè)
文件大?。?/td> 1056K
代理商： T7234A
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Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
108
Lucent Technologies Inc.
Glossary
(continued)
SXB1[1:0]:
S/T-interface transmit path source
for B1 channel (register DFR0,
bits 5—4).
SXB2[1:0]:
S/T-interface transmit path source
for B2 channel (register DFR0,
bits 7—6).
SXD:
S/T-interface transmit path source
for D channel (register DFR1, bit
1).
SXE:
S/T-interface D-channel echo bit
control (register GR2, bit 3).
SYN8K/LBIND/FS:
Synchronous 8 kHz clock or loop-
back indicator, frame strobe.
TDM:
Time-division multiplexed.
TDMB1S:
TDM bus transmit control for
B1 channel from S/T-interface
(register DFR1, bit 2).
TDMB1U:
TDM bus transmit control for
B1 channel from U-interface
(register DFR1, bit 5).
TDMB2S:
TDM bus transmit control for B2
channel from S/T-interface
(register DFR1, bit 3).
TDMB2U:
TDM bus transmit control for B2
channel from U-interface
(register DFR1, bit 6).
TDMDS:
TDM bus transmit control for D
channel from S/T-interface
(register DFR1, bit 4).
TDMDU:
TDM bus transmit control for D
channel from U-interface
(register DFR1, bit 7).
TDMEN:
TDM bus select (register GR2,
bit 5).
TDR0:
TDM bus timing control register.
TNR:
Transmit negative rail for
S/T-interface.
TPR:
Transmit positive rail for
S/T-interface.
TSFINT:
Transmit superframe interrupt
(register UIR0, bit 5).
TSFINTM:
Transmit superframe interrupt
mask (register UIR1, bit 5).
U frame:
An 18-bit synchronous word.
U2BDLN:
Nontransparent 2B+D loopback
control (register GR2, bit 4).
U2BDLT:
Transparent 2B+D loopback con-
trol (register ECR0, bit 6).
UB1LP:
U-interface loopback of B1 chan-
nel control (register ECR0, bit 4).
UB2LP:
U-interface loopback of B2 chan-
nel control (register ECR0, bit 5).
UINT:
U-transceiver interrupt (register
GIR0, bit 0).
UIR0:
U-interface interrupt register.
UIR1:
U-interface interrupt mask
register.
UOA:
U-interface only activation,
(register CFR1, bit 3).
UXB1[1:0]:
U-interface transmit path source
for B1 channel (register DFR0,
bits 1—0).
UXB2[1:0]:
U-interface transmit path source
for B2 channel (register DFR0,
bits 3—2).
UXD:
U-interface transmit path source
for D channel (register DFR1,
bit 0).
V
DDA:
Analog power.
V
DDO:
Crystal oscillator power.
VRCM:
Common-mode voltage reference
for U-interface circuits.
VRN:
Negative voltage reference for U-
interface circuits.
VRP:
Positive voltage reference for U-
interface circuits.
X1:
Crystal #1.
X2:
Crystal #2.
XACT:
U-transceiver active (register
CFR1, bit 1).
XPCY:
Transparency (register GR1,
bit 5).
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