
Flash Media Controller Programming Model
213
September 2005
SCPS110
11.21 General Control Register
The general control register provides miscellaneous PCI-related configuration. See Table 1114 for a
complete description of the register contents.
Function 2 offset:
4Ch
Register type:
Read/Write, Read-only
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
Table 1114. General Control Register
BIT
FIELD NAME
TYPE
DESCRIPTION
7
PCI_PM_
VERSION_CTRL
RW
PCI power-management version control. This bit controls the value reported in bits 20
(PM_VERSION) of the power-management capabilities register (offset 46h, see Section 11.17).
0 = PM_VERSION field reports 010b for PCI Bus Power Management Interface Specification
(Revision 1.1) compatability.
1 = PM_VERSION field reports 011b for PCI Bus Power Management Interface Specification
(Revision 1.2) compatability.
65
INT_SEL
RW
Interrupt select. These bits are program the INTPIN register and set which interrupt output is used.
This field is ignored if one of the USE_INTx terminals is asserted.
00 = INTA
01 = INTB
10 = INTC
11 = INTD
4
D3_COLD
RW
D3cold PME support. This bit sets and clears bit 15 (PME_D3COLD) in the power-management
capabilities register (offset 46h, see Section 11.17).
3
RSVD
R
Reserved. Bit 3 returns 0b when read.
2
SM_DIS
RW
SmartMedia disable. Setting this bit disables support for SmartMedia cards. The flash media
controller reports a SmardMedia card as an unsupported card if this bit is set. If this bit is set, then
all of the SM_SUPPORT bits in the socket enumeration register are 0b.
1
MMC_SD_DIS
RW
MMC/SD disable. Setting this bit disables support for MMC/SD cards. The flash media controller
reports a MMC/SD card as an unsupported card if this bit is set. If this bit is set, then all of the
SD_SUPPORT bits in the socket enumeration register are 0b.
0
MS_DIS
RW
Memory Stick disable. Setting this bit disables support for Memory Stick cards. The flash media
controller reports a Memory Stick card as an unsupported card if this bit is set. If this bit is set, then
all of the MS_SUPPORT bits in the socket enumeration register are 0b.
One or more bits in this register are cleared only by the assertion of GRST.