參數(shù)資料
型號: SII3531ACNU
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, QCC48
封裝: 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48
文件頁數(shù): 64/81頁
文件大?。?/td> 532K
代理商: SII3531ACNU
PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
67
6.3.9
Port Command Execution FIFO
Address Offset: 1020H
Access Type: Read/Write
Reset Value: 0x0000_00XX
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Reserved
Execution Slot
Number
When written, this register causes the supplied slot number to be pushed into the tail of the command execution FIFO. A valid
PRB must be populated in the associated slot in port LRAM. When read, this register supplies the entry at the head of the
command execution FIFO. The FIFO is not popped as a result of a read operation.
6.3.10 Port Command Error
Address Offset: 1024H
Access Type: Read
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Error Code
This register contains the error type resulting from a command error. The following table lists the error codes, error names,
and error descriptions.
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