參數(shù)資料
型號: SII3531ACNU
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, QCC48
封裝: 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48
文件頁數(shù): 21/81頁
文件大?。?/td> 532K
代理商: SII3531ACNU
PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
28
5.3.7
Standard ATA Command PRB Structure
Table 5-5 shows the layout for standard ATA commands. The Control and protocol override fields must be populated as
described above.
31
0
Protocol Override
Control
0x00
Received Transfer Count
0x04
Features / Error
Command / Status
C
R
PMP
FIS Type
0x08
Dev/Head
Cyl High
Cyl Low
Sector Number
0x0C
Features (Exp)
Cyl High (Exp)
Cyl Low (Exp)
Sector Num (Exp)
0x10
Device Control
Reserved
Sector Count (Exp)
Sector Count
0x14
Reserved
0x18
Reserved – Must Be Zero
0x1C
SGE0 Data Address Low
0x20
SGE0 Data Address High
0x24
SGE0 Data Count
0x28
SGE0 TRM
SGE0 LNK
SGE0 DRD
SGE0 XCF
Reserved[27:0]
0x2C
SGE1 Data Address Low
0x30
SGE1 Data Address High
0x34
SGE1 Data Count
0x38
SGE1 TRM
SGE1 LNK
SGE1 DRD
SGE1 XCF
Reserved[27:0]
0x3C
Table 5-5 Port Request Block For Standard ATA Commands
The Received Transfer Count field (offset 0x04) is reserved as an input to the SiI3531A and should be populated with a value
of all zeroes. Upon successful command completion, this field will contain the total number of data bytes received during the
command execution. The host driver may use this field to determine the transfer size for commands in which the total transfer
size is unknown, such as ATAPI inquiries.
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