參數(shù)資料
型號: SII3531ACNU
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, QCC48
封裝: 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48
文件頁數(shù): 37/81頁
文件大小: 532K
代理商: SII3531ACNU
PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
42
c.
Write zeroes (0x00000000) to the Port Device QActive Register for the device(s) in error ((port*0x2000) +
0xf84 + (PM port of device in error * 8)). This action ensures that all queued command context is removed
before re-issuing commands.
d.
Issue a Port Initialize and wait for Port Ready condition.
4.
The host driver may now resume normal command processing. The host driver must determine which commands
need to be re-issued to the device in error. Note that if native queued commands were outstanding to the device in
error, the host must issue a READ LOG EXTENDED command to clear the pending error condition and determine
the tag number (slot number) of the command in error before resuming command processing.
Note: It is a good idea to clear Port Resume (Port Control Clear Register, Bit 6) whenever a Port Initialize or Port Device
Reset is issued. This ensures that the Port Resume bit is always cleared when starting normal processing in the event
that an abnormal exit is taken from the error recovery procedure.
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