參數(shù)資料
型號(hào)： SCANSTA101
廠商： National Semiconductor Corporation
英文描述： RES 30K OHM 1/16W 0.1% 0402 SMD
中文描述： 低壓主STA的IEEE 1149.1標(biāo)準(zhǔn)
文件頁(yè)數(shù)： 3/31頁(yè)
文件大?。?/td> 403K
代理商： SCANSTA101
TABLE 2. Pin Descriptions
Pin
Name
Description
No.
Pins
4
4
16
I/O
VCC
GND
D(15:0)
N/A
N/A
I/O
Power
Ground
Bidirectional Data Bus. Signals are bonded out for the packaged device.
D15 and D14 are shared pins with SCAN_IN, and SCAN_OUT
respectively.
Bidirectional Data Bus. These signals are not available in the packaged
device.
Address Bus
The system clock that drives all internal timing. TCK_SM is a gated,
divided and buffered version of SCK.
Interrupt Output
Output enable that tristates all 1149.1 "_SM" outputs when high.
DTACK is used to synchronize asynchronous transfers between the host
and the STA101. When CE is high, DTACK is tristated. When CE is low,
DTACK is enabled. DTACK goes low when data has been registered and
then goes tri-state when the cycle has completed.
R/W defines a PPI cycle. Read when high, write when low.
Strobe is used for timing all PPI transfers. D(15:0), or D(31:0) in 32-bit
mode, are tristated when STB is high. Data valid setup is with respect to
the falling edge of STB and data valid hold is with respect to rising edge of
STB.
Chip Enable, when low, enables the PPI for data transfers. CE can remain
low during back-to-back accesses. D(15:0), or D(31:0) in 32-bit mode, and
DTACK are tristated when CE is high.
Asynchronous reset, when low, initializes the STA101.
Test Data Out is the serial scan output from the STA101. TDO is enabled
when OE is low.
Test Data In is the serial scan input to the STA101.
Test Mode Select. The Test Mode Select pin is a serial input used to
accept control logic to the Test & debug interface.
Test Clock Input for 1149.1
Test Reset
Scan Master Test Data Input in the Serial Scan Interface
Scan Master Test Data Output in the Serial Scan Interface
Scan Master Test Mode Select in the Serial Scan Interface
Scan Master Test Clock in the Serial Scan Interface
Scan Master Test Reset output in the Serial Scan Interface
Redundent ScanMaster TRST. This signal is not available for the
packaged device.
The TRI-STATE notification pin exerts a high signal when TDO_SM is
TRI-STATED
D(31:16)
(Note 1)
A(4:0)
SCK
16
I/O
5
1
I
I
INT
OE
DTACK
1
1
1
O
I
O
R/W
STB
1
1
I
I
CE
1
I
RST
TDO
1
1
I
O
TDI
TMS
1
1
I
I
TCK
TRST
TDI_SM
TDO_SM
TMS_SM
TCK_SM
TRST0_SM
TRST1_SM
(Note 1)
TRIST_SM
1
1
1
1
1
1
1
1
I
I
I
O
O
O
O
O
1
O
Note 1:
D(31:16) in the Parallel Processor Interface and TRST1_SM in the Serial Scan Interface are not bonded out for the packaged part. These are used in the
32-bit Macro Mode only.
S
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SCANSTA101_06 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Low Voltage IEEE 1149.1 STA Master
SCANSTA101SM 功能描述:接口 - 專(zhuān)用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類(lèi)型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
SCANSTA101SM/NOPB 功能描述:接口 - 專(zhuān)用 Low Vltg IEEE 1149.1 Sys Test Access RoHS:否 制造商:Texas Instruments 產(chǎn)品類(lèi)型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
SCANSTA101SM/NOPB 制造商:Texas Instruments 功能描述:Test Master IC
SCANSTA101SMX 功能描述:接口 - 專(zhuān)用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類(lèi)型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
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