參數(shù)資料
型號(hào): SCANSTA101
廠商: National Semiconductor Corporation
英文描述: RES 30K OHM 1/16W 0.1% 0402 SMD
中文描述: 低壓主STA的IEEE 1149.1標(biāo)準(zhǔn)
文件頁(yè)數(shù): 15/31頁(yè)
文件大?。?/td> 403K
代理商: SCANSTA101
Serial Scan Interface
(Continued)
COMPARATOR AND EXPECTED/MASK REGISTERS
The One Bit Comparator, when enabled, will compare
TDI_SM input with expected data. When the compare fea-
ture is enabled (pre-load only) the SSIC pre-fetches data into
Expected and Mask registers from the address locations
pertaining to the current vector being processed. The com-
parator will compare each bit on the TDI_SM input with the
corresponding bit from the expected register. If the mask
feature is enabled, then the comparison is performed only on
those bits that are not masked, i.e., on those bits whose
mask is set to zero.
Table 12
shows how Compare and Use
Mask/Compare bits in the Macro Structure will be used.
TABLE 12. Compare and Use Mask/Compare Bit Descriptions
Compare
0
0
1
1
Use Mask/Compare
0
1
0
1
Description
Do Not Compare
Compare with Mask
Compare without Mask
Compare with Mask
Results of Compare bit (bit 15 of Status register) stores the
comparison results in the status register. This bit defaults to
fail (zero) and will be updated only after the current vector is
processed. In the case of a single vector the Results of
Compare bit will be set to one (pass) only if all the bits in the
scanned in vector match the expected vector. However, in
the case of the sequencer only the results of final vector
comparison will be taken into account.
Each vector within the sequencer is repeated until the vector
repeat count is exhausted. However, the sequence is re-
10121524
FIGURE 5. Shift Register Implementation and Timing
S
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