參數(shù)資料
型號(hào)： SCANSTA101
廠商： National Semiconductor Corporation
英文描述： RES 30K OHM 1/16W 0.1% 0402 SMD
中文描述： 低壓主STA的IEEE 1149.1標(biāo)準(zhǔn)
文件頁(yè)數(shù)： 28/31頁(yè)
文件大?。?/td> 403K
代理商： SCANSTA101
Software Interface Details
(Continued)
TABLE 24. Clock Divider Register (CLKDIV) ($05)
Bit(s)
Type
Field
Address
Offset
0
0
0
Reset Value
Reset Source
15:8
7:1
0
RO
RW
RO
Reserved
Divisor
Reserved (hard coded) (Note 23)
00h
00h
0b
SYS_RST
Note 23:
LSB of the Clock Divider register is hard coded to zero.
Divisor
<
7:1
>
Clock divisor for the division of the SCK clock to the serial scan clock.
No serial scan clock generated.
Divide SCK by 2
Divide SCK by 4
Divide SCK by 8
Divide SCK by 16
Divide SCK by 32
Divide SCK by 64
Divide SCK by 128
’0000000’
’0000001’
’0000010’
’0000100’
’0001000’
’0010000’
’0100000’
’1000000’
TABLE 25. TDI_SM LFSR Exponent Register (EXPR) ($07)
Bit(s)
Type
Field
Address
Offset
0
0
Reset Value
Reset Source
15:3
2:0
RO
RW
Reserved
LFSR
0000h
000b
SYS_RST
LFSR Exponent
<
2:0
>
’000’
’001’
’010’
’011’
LFSR exponent. Binary encoding for the selection between three polynomials.
No polynomial selected
Polynomial 1: X
32
+ X
7
+ X
5
+ X
3
+ X
2
+ X + 1
Polynomial 2: X
32
+ X
28
+ X
27
+ X + 1
Polynomial 3: X
32
+ X
7
+ X
6
+ X
2
+ 1
TABLE 26. TDI_SM LFSR LSB Seed Register (LSSEDR) ($08)
(Notes 24, 25)
Bit(s)
Type
Field
Address
Offset
0
Reset Value
Reset Source
15:0
RW
LSW LFSR Seed
0000h
SYS_RST
Note 24:
LSW LFSR Seed
<
15:0
>
is the LS word of the LFSR seed.
Note 25:
This register along with register MSSEDR form a register pair and should be read/written with two consecutive read/write accesses.
TABLE 27. TDI_SM LFSR MSB Seed Register (MSSEDR) ($09)
(Notes 26, 27)
Bit(s)
Type
Field
Address
Offset
0
Reset Value
Reset Source
15:0
RW
MSW LFSR Seed
0000h
SYS_RST
Note 26:
MSW LFSR Seed
<
15:0
>
is the MS word of the LFSR seed.
Note 27:
This register along with register LSSEDR form a register pair and should be read/ written with two consecutive read/write accesses.
TABLE 28. TDI_SM LFSR LSB Result Register (LSRESR) ($0A)
(Notes 28, 29)
Bit(s)
Type
Field
Address
Offset
0
Reset Value
Reset Source
15:0
RW
LSW LFSR Result
0000h
SYS_RST
Note 28:
LSW LFSR Result
<
15:0
>
is the LS word of the LFSR result.
Note 29:
This register along with register MSRESR form a register pair and should be read/written with two consecutive read/write accesses.
S
www.national.com
28
相關(guān)PDF資料
PDF描述
SCANSTA111SM EMITTER IR 850NM 5MM RADIAL
SCANSTA111 Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
SCANSTA111MT Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
SCANSTA112 7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer
SCANSTA112SM 7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SCANSTA101_06 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Voltage IEEE 1149.1 STA Master
SCANSTA101SM 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
SCANSTA101SM/NOPB 功能描述:接口 - 專用 Low Vltg IEEE 1149.1 Sys Test Access RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
SCANSTA101SM/NOPB 制造商:Texas Instruments 功能描述:Test Master IC
SCANSTA101SMX 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*