
III PERIPHERAL MODULES 1 (SYSTEM): INTERRUPT CONTROLLER (ITC)
S1C33E07 TECHNICAL MANUAL
EPSON
III-2-51
III
ITC
0x300291: 16-bit Timer 1–4 IDMA Request Register (pIDMAREQ_R16T14)
Name
Address
Register name
Bit
Function
Setting
Init. R/W
Remarks
R16TC4
R16TU4
R16TC3
R16TU3
R16TC2
R16TU2
R16TC1
R16TU1
D7
D6
D5
D4
D3
D2
D1
D0
16-bit timer 4 comparison A
16-bit timer 4 comparison B
16-bit timer 3 comparison A
16-bit timer 3 comparison B
16-bit timer 2 comparison A
16-bit timer 2 comparison B
16-bit timer 1 comparison A
16-bit timer 1 comparison B
0
R/W
00300291
(B)
1 IDMA
request
0 Interrupt
request
16-bit timer 1–4
IDMA request
register
(pIDMAREQ
_R16T14)
Each bit in this register specifies whether to invoke IDMA when a cause of interrupt occurs.
When using the set-only method (default)
1 (R/W): IDMA request
0 (R/W): IDMA not invoked (default)
When using the read/write method
1 (R/W): IDMA request
0 (R/W): Interrupt request
If the bit is set to 1, IDMA is invoked when a cause of interrupt occurs, thereby performing a programmed data
transfer. If the bit is set to 0, normal interrupt processing is performed, without invoking IDMA.
For details on IDMA, refer to Section II.2, “Intelligent DMA (IDMA).”
If interrupts are enabled on the IDMA side and the transfer counter reaches the terminal count of 0 after completion
of DMA transfer, the IDMA request bit is reset to 0 and an interrupt request for the cause of interrupt that enabled
IDMA invoking is generated.
D7
R16TC4: 16-bit Timer 4 Comparison A IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 4 comparison A interrupt occurs or
not.
D6
R16TU4: 16-bit Timer 4 Comparison B IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 4 comparison B interrupt occurs or
not.
D5
R16TC3: 16-bit Timer 3 Comparison A IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 3 comparison A interrupt occurs or
not.
D4
R16TU3: 16-bit Timer 3 Comparison B IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 3 comparison B interrupt occurs or
not.
D3
R16TC2: 16-bit Timer 2 Comparison A IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 2 comparison A interrupt occurs or
not.
D2
R16TU2: 16-bit Timer 2 Comparison B IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 2 comparison B interrupt occurs or
not.
D1
R16TC1: 16-bit Timer 1 Comparison A IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 1 comparison A interrupt occurs or
not.
D0
R16TU1: 16-bit Timer 1 Comparison B IDMA Request Bit
Specifies whether to invoke IDMA when a cause of the 16-bit timer 1 comparison B interrupt occurs or
not.