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參數(shù)資料
| 型號(hào)： | Q6701-H6481 |
| 廠商： | SIEMENS AG |
| 英文描述： | Quadruple Transceiver for S/T Interface QUAT-S |
| 中文描述： | 四聯(lián)收發(fā)器的S / T接口葛- ? |
| 文件頁(yè)數(shù)： | 51/72頁(yè) |
| 文件大?。?/td> | 1267K |
| 代理商： | Q6701-H6481 |
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PEB 2084
Semiconductor Group
51
3.5
Different test loops for B1, B2 and D-channels can be closed in the QUAT-S:
– Transparent analog loops (the data are also sent forward).
– Non transparent analog loops (the forward data path is blocked).
– External transparent analog loop for board test.
Diagnostic Functions, Test Loop-backs
The loops may be closed in both operational modes, in LT-S and in LT-T, via the C/I
command ARL which may be applied (continuously) in the states “G4 pending
deactivation”, “G4 wait for DR” and “G1 deactivated”.
Loop transparency can be achieved by setting the LP-bit in the Configuration Register.
An example is shown in
figure 27.
Figure 27
An Example for QUAT-S in LT-S Mode with a Transparent Loop (Loop 2)
and in LT-T Mode with a Non Transparent Loop (Loop 3)
Loop 2 and 3 are activated over the IOM-2 interface with Activate Request Loop (ARL).
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