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參數(shù)資料
| 型號(hào)： | Q6701-H6481 |
| 廠商： | SIEMENS AG |
| 英文描述： | Quadruple Transceiver for S/T Interface QUAT-S |
| 中文描述： | 四聯(lián)收發(fā)器的S / T接口葛- ? |
| 文件頁(yè)數(shù)： | 46/72頁(yè) |
| 文件大小： | 1267K |
| 代理商： | Q6701-H6481 |
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PEB 2084
Semiconductor Group
46
Indications (downstream)
LT-T Mode
Deactivate request
Abbreviation Code
Remark
DR
0000
Deactivation request via S/T
interface
Reset acknowledge
TM1 acknowledge
TM2 acknowledge
Wander is larger than 50
μ
s peak-
to-peak (or 25
μ
s peak-to-peak if
programmed, refer to the C/W-bit
of the Configuration Register)
Signal received, receiver not
synchronous
Line interface is powered up
INFO 2 received
Loop 3 closed
After each multiframe the receipt
of at least one illegal code
violation is indicated four times.
This function must be enabled by
setting the RCVE-bit in the
configuration register.
Loop 3 activated
INFO 4 received,
D-channel priority is 8 or 9
INFO 4 received,
D-channel priority is 10 or 11
Line interface is powered down
Reset
Test mode 1
Test mode 2
Slip detected
RES
TM1
TM2
SLIP
0001
0010
0011
0011
Resynchronization during
level detect
Power up
Activate request
Activate request loop
Code violation received
RSY
0100
PU
AR
ARL
CVR
0111
1000
1010
1011
Activate indication loop
Activate indication with
priority class 8
Activate indication with
priority class 10
Deactivate confirmation
AIL
AI8
1110
1100
AI10
1101
DC
1111
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| Q67020-Y150 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Octal Latch |
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| Q67020-Y152 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:CLOCK GENERATOR AND DRIVER FOR SAB8086 FAMILY PROCESSORS |
| Q67020-Y153 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:OCTAL BUS TRANSCEIVER |
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