參數(shù)資料
型號(hào): Q6701-H6481
廠商: SIEMENS AG
英文描述: Quadruple Transceiver for S/T Interface QUAT-S
中文描述: 四聯(lián)收發(fā)器的S / T接口葛- ?
文件頁(yè)數(shù): 23/72頁(yè)
文件大?。?/td> 1267K
代理商: Q6701-H6481
PEB 2084
Semiconductor Group
23
IDCODE Register
The 32-bit identification register is serially read out via TDO. It contains the version
number (4 bits), the device code (16 bits) and the manufacture code (11 bits). The LSB
is fixed to “1”.
Note:
In the state “test logic reset” the code “0011” is loaded into the instruction code
register.
Test Modes TM1 and TM2
Two different pulse types at the line interface SXna,b are selectable: 2 kHz single pulses
or 96 kHz continuous pulses,
figure 8.
Figure 8
Test Pulse Wave Forms
BYPASS
, a bit entering TDI is shifted to TDO after one TCK clock cycle, e.g. to skip
testing of selected ICs on a printed circuit board.
Version
Device Code
Manufacture Code
Output
0001
0000 0000 0010 0000
0000 1000 001
1
TDO
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