參數(shù)資料
型號: Q6701-H6481
廠商: SIEMENS AG
英文描述: Quadruple Transceiver for S/T Interface QUAT-S
中文描述: 四聯(lián)收發(fā)器的S / T接口葛- ?
文件頁數(shù): 44/72頁
文件大?。?/td> 1267K
代理商: Q6701-H6481
PEB 2084
Semiconductor Group
44
LT-S Mode States
G1 deactivated
The line interface is not transmitting. There is no signal detected on the S interface,
and no activation command is received in the C/I channel.
G2 pending activation
As a result of an INFO 1 detected on the S line or an ARD command, the line interface
begins transmitting INFO 2 and waits for reception of INFO 3. The timer to supervise
reception of INFO 3 is to be implemented in software. In case of an ARL command,
loop 2 is closed.
G3 activated
Normal state where INFO 4 is transmitted to the S interface. The line interface
remains in this state as long as neither a deactivation nor a test mode is requested,
nor the receiver looses synchronism. When receiver synchronism is lost, INFO 2 is
sent automatically. After reception of INFO 3, the transmitter keeps on sending
INFO 4.
G2 lost framing
This state is reached when the line interface has lost synchronism in the state G3
activated.
G4 pending deactivation
This state is triggered by a deactivation request DR. It is an unstable state: indication
DI (state “G4 wait for DR.”) is issued by the QUAT-S when: either INFO 0 is received,
or an internal timer of 32 ms expires.
G4 wait for DR
Final state after a deactivation request. The line interface remains in this state until a
response to DI (in other words DC) is issued.
Test mode 1
Single alternating pulses are sent on the S interface (2 kHz repetition rate).
Test mode 2
Continuous alternating pulses are sent on the S interface (96 kHz).
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