參數(shù)資料
型號: Q6701-H6481
廠商: SIEMENS AG
英文描述: Quadruple Transceiver for S/T Interface QUAT-S
中文描述: 四聯(lián)收發(fā)器的S / T接口葛- ?
文件頁數(shù): 22/72頁
文件大?。?/td> 1267K
代理商: Q6701-H6481
PEB 2084
Semiconductor Group
22
TAP Controller
The Test Access Port (TAP) controller implements the state machine defined in the
JTAG standard IEEE Std. 1149.1. Transitions on the pin TMS cause the TAP controller
to perform a state change.
Following the standard definition five instructions are executable.
TAP controller instructions:
Note:
The instructions TM1 and TM2 require 7.68 MHz at XTAL1.
EXTEST
is used to examine the board interconnections.
When the TAP controller is in the state “update DR”, all output pins are updated with the
falling edge of TCK. When it has entered state “capture DR” the levels of all input pins
are latched with the rising edge of TCK. The in/out shifting of the scan vectors is typically
done using the instruction SAMPLE/PRELOAD.
INTEST
supports internal chip testing.
When the TAP controller is in the state “update DR”, all inputs are updated internally with
the falling edge of TCK. When it has entered state “capture DR” the levels of all outputs
are latched with the rising edge of TCK. The in/out shifting of the scan vectors is typically
done using the instruction SAMPLE/PRELOAD.
0001 (INTEST) is the default value of the instruction register.
SAMPLE / PRELOAD
provides a snap-shot of the pin level during normal operation or
is used to preload (TDI) / shift out (TDO) the boundary scan with a test vector. Both
activities are transparent to the system functionality.
Note:
The input pin XTAL1 should not be evaluated.
The input frequency (7.68 MHz) is not synchronous to TCK (6.25 MHz) which may
cause not predictable snap-shots on the pin XTAL1.
Code
0000
0001
0010
0011
0100
0101
11XX
Instruction
EXTEST
INTEST
SAMPLE/PRELOAD
IDCODE
Test Mode TM1
Test Mode TM2
BYPASS
Function
External testing
Internal testing
Snap-shot testing
Reading ID code
Single pulses (2 kHz) on SXna,b
Continuous pulses (96 kHz) on SXna,b
Bypass operation
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